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[core] Fix delay_ns cycle calculation
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salkinium committed Jun 12, 2021
1 parent 2a7b3e4 commit 3025794
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Showing 2 changed files with 6 additions and 17 deletions.
17 changes: 3 additions & 14 deletions examples/nucleo_f303k8/blink/main.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -17,23 +17,12 @@ int
main()
{
Board::initialize();
LedD13::setOutput();

// Use the logging streams to print some messages.
// Change MODM_LOG_LEVEL above to enable or disable these messages
MODM_LOG_DEBUG << "debug" << modm::endl;
MODM_LOG_INFO << "info" << modm::endl;
MODM_LOG_WARNING << "warning" << modm::endl;
MODM_LOG_ERROR << "error" << modm::endl;

uint32_t counter(0);
GpioA4::setOutput();

while (true)
{
LedD13::toggle();
modm::delay(Button::read() ? 100ms : 500ms);

MODM_LOG_INFO << "loop: " << counter++ << modm::endl;
GpioA4::toggle();
modm::delay_ns(100000);
}

return 0;
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6 changes: 3 additions & 3 deletions src/modm/platform/core/cortex/delay_impl.hpp.in
Original file line number Diff line number Diff line change
Expand Up @@ -31,15 +31,15 @@ extern uint16_t delay_ns_per_loop;
extern uint16_t delay_fcpu_MHz;
}

inline void modm_fastcode delay_ns(uint32_t ns)
inline void modm_fastcode __attribute__((noinline)) delay_ns(uint32_t ns)
{
volatile uint32_t cycles;
// ns_per_loop = nanoseconds per cycle times cycles per loop ({{loop}} cycles)
asm volatile (
".syntax unified \n\t"
".align 4 \n\t"
"muls.n %[cyc], %[cyc], %[dnpl] \n\t" // multiply the overhead cycles with the ns per cycle: 1-2 cycles on cm3, up to 32 cycles on cm0
"subs.n %[cyc], %[cyc], %[ovhd] \n\t" // subtract the overhead in ns from the input: 1 cycle
// "muls.n %[ovhd], %[ovhd], %[dnpl] \n\t" // multiply the overhead cycles with the ns per cycle: 1-2 cycles on cm3, up to 32 cycles on cm0
// "subs.n %[cyc], %[cyc], %[ovhd] \n\t" // subtract the overhead in ns from the input: 1 cycle
"1: subs.n %[cyc], %[cyc], %[dnpl] \n\t" // subtract the ns per loop from the input: 1 cycle
"bpl.n 1b" // keep doing that while result is still positive: 2 cycles (when taken)
: [cyc] "=l" (cycles) : "0" (ns), [dnpl] "l" (platform::delay_ns_per_loop), [ovhd] "l" ({{(overhead / loop) | int}}));
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