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Integration Candidate COMBINED 2020-04-29 and 2020-05-06 #160

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2 changes: 2 additions & 0 deletions CMakeLists.txt
Original file line number Diff line number Diff line change
Expand Up @@ -9,13 +9,15 @@ add_definitions(-D_CFE_PSP_)
include_directories(fsw/shared)

# Build the PSP implementation which lies in a system-specific subdirectory
include_directories(fsw/shared)
include_directories(fsw/${CFE_SYSTEM_PSPNAME}/inc)
add_subdirectory(fsw/${CFE_SYSTEM_PSPNAME} ${CFE_SYSTEM_PSPNAME})

# Build the "common" parts as a library
add_library(psp-${CFE_SYSTEM_PSPNAME} STATIC
fsw/shared/cfe_psp_configdata.c
fsw/shared/cfe_psp_eeprom.c
fsw/shared/cfe_psp_exceptionstorage.c
fsw/shared/cfe_psp_memrange.c
fsw/shared/cfe_psp_memutils.c
fsw/shared/cfe_psp_module.c
Expand Down
90 changes: 54 additions & 36 deletions README.md
Original file line number Diff line number Diff line change
Expand Up @@ -4,63 +4,81 @@ Travis-CI: [![Build Status](https://travis-ci.com/nasa/PSP.svg)](https://travis-

This repository contains NASA's Platform Support Package (PSP), which is a framework component of the Core Flight System.

This is a collection of APIs abstracting platform specific functionality to be located in the `psp` subdirectory of a cFS Mission Tree. The Core Flight System is bundled at https://github.com/nasa/cFS, which includes build and execution instructions.
This is a collection of APIs abstracting platform specific functionality to be located in the `psp` subdirectory of a cFS Mission Tree. The Core Flight System is bundled at <https://github.com/nasa/cFS>, which includes build and execution instructions.

## Version History

### Development Build: 1.4.11

- Removes non-termination string warnings when building with GCC9.
- Exception handling is now implemented on POSIX. There is no longer a separate handler for SIGINT - it is now treated as an exception and goes through the normal process which ends up "restarting" CFE. On pc-linux causes the process to exit normally. There is now a mechanism to capture the CTRL+C exception code and use it during normal test cycles.
- See <https://github.com/nasa/PSP/pull/160>

#### Development Build: 1.4.10
- Implements full-precision microsecond conversion
- See https://github.com/nasa/PSP/pull/155

#### Development Build: 1.4.9
- RTEMS builds successfully without errors
- Build script uses a proper CMakeLists.txt instead of the aux_source directory
- Minor updates (see https://github.com/nasa/PSP/pull/153)
- Implements full-precision microsecond conversion
- See <https://github.com/nasa/PSP/pull/155>

### Development Build: 1.4.9

- RTEMS builds successfully without errors
- Build script uses a proper CMakeLists.txt instead of the aux_source directory
- Minor updates (see <https://github.com/nasa/PSP/pull/153>)

### Development Build: 1.4.8

- Minor updates (see <https://github.com/nasa/PSP/pull/151>)

### Development Build: 1.4.7

- Fixed some build warnings for MCP750
- Minor updates (see <https://github.com/nasa/PSP/pull/142>)

### Development Build: 1.4.6

- Minor updates (see <https://github.com/nasa/PSP/pull/141>)

### Development Build: 1.4.5

- Simplifies array handling in VxWorks
- Minor updates (see <https://github.com/nasa/PSP/pull/138>)

### Development Build: 1.4.4

- Minor updates (see <https://github.com/nasa/PSP/pull/132>)

#### Development Build: 1.4.8
- Minor updates (see https://github.com/nasa/PSP/pull/151)
### Development Build: 1.4.3

#### Development Build: 1.4.7
- Fixed some build warnings for MCP750
- Minor updates (see https://github.com/nasa/PSP/pull/142)
- Minor updates (see <https://github.com/nasa/PSP/pull/130>)

#### Development Build: 1.4.6
- Minor updates (see https://github.com/nasa/PSP/pull/141)
### Development Build: 1.4.2

#### Development Build: 1.4.5
- Simplifies array handling in VxWorks
- Minor updates (see https://github.com/nasa/PSP/pull/138)
- Minor updates (see <https://github.com/nasa/PSP/pull/127>)

#### Development Build: 1.4.4
- Minor updates (see https://github.com/nasa/PSP/pull/132)
### Development Build: 1.4.1

#### Development Build: 1.4.3
- Minor updates (see https://github.com/nasa/PSP/pull/130)
- Minor updates (see <https://github.com/nasa/PSP/pull/115>)

#### Development Build: 1.4.2
- Minor updates (see https://github.com/nasa/PSP/pull/127)
### **_1.4.0 OFFICIAL RELEASE_**

#### Development Build: 1.4.1
- Minor updates (see https://github.com/nasa/PSP/pull/115)
- This is a point release from an internal repository
- Changes are detailed in [cFS repo](https://github.com/nasa/cFS) release documentation
- Released as part of cFE 6.7.0, Apache 2.0

### \*\*\* 1.4.0 OFFICIAL RELEASE \*\*\*
- This is a point release from an internal repository
- Changes are detailed in [cFS repo](https://github.com/nasa/cFS) release documentation
- Released as part of cFE 6.7.0, Apache 2.0
### **_1.3.0a OFFICIAL RELEASE_**

### \*\*\* 1.3.0a OFFICIAL RELEASE \*\*\*
- This is a point release from an internal repository
- See [version description document](https://github.com/nasa/PSP/blob/v1.3.0a/doc/PSP%201.3.0.0%20Version%20Description%20Document.pdf)
- Released as part of cFE 6.6.0a, Apache 2.0
- This is a point release from an internal repository
- See [version description document](https://github.com/nasa/PSP/blob/v1.3.0a/doc/PSP%201.3.0.0%20Version%20Description%20Document.pdf)
- Released as part of cFE 6.6.0a, Apache 2.0

The open source release does not include all PSPs that have been developed. Only the three PSPs included are managed by the community CCB. PSPs developed by other organizations can be requested through the mechanisms listed below. Note the framework PSPs delivered may change in the future as platforms become obsolete.
The open source release does not include all PSPs that have been developed. Only the three PSPs included are managed by the community CCB. PSPs developed by other organizations can be requested through the mechanisms listed below. Note the framework PSPs delivered may change in the future as platforms become obsolete.

## Known issues

See all open issues and closed to milestones later than this version.

## Getting Help

For best results, submit issues:questions or issues:help wanted requests at https://github.com/nasa/cFS.
For best results, submit issues:questions or issues:help wanted requests at <https://github.com/nasa/cFS>.

Official cFS page: http://cfs.gsfc.nasa.gov
Official cFS page: <http://cfs.gsfc.nasa.gov>
17 changes: 6 additions & 11 deletions fsw/inc/cfe_psp.h
Original file line number Diff line number Diff line change
Expand Up @@ -65,6 +65,7 @@
#define CFE_PSP_ERROR_NOT_IMPLEMENTED (-27)
#define CFE_PSP_INVALID_MODULE_NAME (-28)
#define CFE_PSP_INVALID_MODULE_ID (-29)
#define CFE_PSP_NO_EXCEPTION_DATA (-30)



Expand Down Expand Up @@ -196,7 +197,7 @@ extern uint32 CFE_PSP_GetRestartType(uint32 *restartSubType );
*/


extern void CFE_PSP_FlushCaches(uint32 type, cpuaddr address, uint32 size);
extern void CFE_PSP_FlushCaches(uint32 type, void* address, uint32 size);
/*
** This is a BSP specific cache flush routine
*/
Expand Down Expand Up @@ -247,16 +248,6 @@ extern uint32 CFE_PSP_Get_Dec(void);
** CFE_PSP_Get_Dec
*/


extern int32 CFE_PSP_InitProcessorReservedMemory(uint32 RestartType );
/*
** CFE_PSP_InitProcessorReservedMemory initializes all of the memory in the
** BSP that is preserved on a processor reset. The memory includes the
** Critical Data Store, the ES Reset Area, the Volatile Disk Memory, and
** the User Reserved Memory. In general, the memory areas will be initialized
** ( cleared ) on a Power On reset, and preserved during a processor reset.
*/

extern int32 CFE_PSP_GetCDSSize(uint32 *SizeOfCDS);
/*
** CFE_PSP_GetCDSSize fetches the size of the OS Critical Data Store area.
Expand Down Expand Up @@ -368,6 +359,10 @@ extern void CFE_PSP_SetDefaultExceptionEnvironment(void);
*/


extern uint32 CFE_PSP_Exception_GetCount(void);
extern int32 CFE_PSP_Exception_GetSummary(uint32 *ContextLogId, uint32 *TaskId, char *ReasonBuf, uint32 ReasonSize);
extern int32 CFE_PSP_Exception_CopyContext(uint32 ContextLogId, void *ContextBuf, uint32 ContextSize);

/*
** I/O Port API
*/
Expand Down
8 changes: 1 addition & 7 deletions fsw/inc/cfe_psp_configdata.h
Original file line number Diff line number Diff line change
Expand Up @@ -58,18 +58,12 @@ typedef const struct
uint32 PSP_WatchdogMin; /**< PSP Minimum watchdog in milliseconds */
uint32 PSP_WatchdogMax; /**< PSP Maximum watchdog in milliseconds */
uint32 PSP_MemTableSize; /**< Size of PSP memory table */
uint32 PSP_ExceptionLogSize; /**< Size of PSP exception log */
CFE_PSP_MemTable_t *PSP_MemoryTable; /**< Pointer to PSP memory table (forward reference) */

uint32 OS_VolumeTableSize; /**< Size of OS volume table */
OS_VolumeInfo_t *OS_VolumeTable; /**< Pointer to OS volume table (forward reference) */

/**
* Processor Context type.
* This is needed to determine the size of the context entry in the ER log.
* It is a placeholder as the implementation to use it is not merged in yet.
*/
uint32 OS_CpuContextSize;

/**
* Number of EEPROM banks on this platform
*/
Expand Down
58 changes: 47 additions & 11 deletions fsw/mcp750-vxworks/inc/cfe_psp_config.h
Original file line number Diff line number Diff line change
Expand Up @@ -44,21 +44,47 @@
*/
#define CFE_PSP_MEM_TABLE_SIZE 10

/**
* This define sets the maximum number of exceptions
* that can be stored.
*
* It must always be a power of two.
*/
#define CFE_PSP_MAX_EXCEPTION_ENTRIES 4

/*
** Processor Context type.
** This is needed to determine the size of the context entry in the ER log.
** Although this file is in a CPU directory, it really is OS dependant, so supporting
** multiple OSs on the same CPU architecture ( i.e. x86/linux, x86/windows, x86/osx )
** will require IFDEFS.
** Typedef for the layout of the vxWorks boot record structure
**
** This is statically placed at the beginning of system memory (sysMemTop)
** which should be reserved in the kernel.
*/
typedef struct
typedef struct
{
ESFPPC esf; /* Exception stack frame */
FP_CONTEXT fp; /* floating point registers */

} CFE_PSP_ExceptionContext_t;
uint32 bsp_reset_type;
uint32 spare1;
uint32 spare2;
uint32 spare3;

} CFE_PSP_ReservedMemoryBootRecord_t;

#define CFE_PSP_CPU_CONTEXT_SIZE (sizeof(CFE_PSP_ExceptionContext_t))

/**
* \brief The data type used by the underlying OS to represent a thread ID.
*/
typedef TASK_ID CFE_PSP_Exception_SysTaskId_t;

/*
** Global variables
*/
typedef struct
{
UINT32 timebase_upper; /* Upper 32 bits of timebase as sampled by hook */
UINT32 timebase_lower; /* Lower 32 bits of timebase as sampled by hook */
int vector; /* vector number */
ESFPPC esf; /* Exception stack frame */
FP_CONTEXT fp; /* floating point registers */

} CFE_PSP_Exception_ContextDataEntry_t;

/*
** Watchdog minimum and maximum values ( in milliseconds )
Expand All @@ -71,6 +97,16 @@ typedef struct
*/
#define CFE_PSP_NUM_EEPROM_BANKS 1

/*
* The alignment to use for each reserved memory block.
*
* This is a mask to be applied to each block base address
*
* Chosen as the cache line size of the MPC750 processor (32 bytes)
* such that the blocks will be cached more efficiently.
*/
#define CFE_PSP_MEMALIGN_MASK ((cpuaddr)0x1F)


#endif

2 changes: 1 addition & 1 deletion fsw/mcp750-vxworks/inc/psp_version.h
Original file line number Diff line number Diff line change
Expand Up @@ -35,7 +35,7 @@
*/
#define CFE_PSP_IMPL_MAJOR_VERSION 1
#define CFE_PSP_IMPL_MINOR_VERSION 4
#define CFE_PSP_IMPL_REVISION 10
#define CFE_PSP_IMPL_REVISION 11
#define CFE_PSP_IMPL_MISSION_REV 0

#endif /* _psp_version_ */
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