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chore: Rework DIE pass to operate on a postorder SCC CFG #6490
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Changes to Brillig bytecode sizes
🧾 Summary (10% most significant diffs)
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Changes to number of Brillig opcodes executed
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8 tasks
Closing this to work on an alternate solution for mem2reg (this was only needed for #6460) |
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Description
Problem*
This is currently preventing DIE from being able to remove side-effectful instructions like stores or increment_rcs directly. Instead we rely on either special checks in mem2reg (for stores) or special checks in DIE for inc/decrement rcs.
Summary*
This is part of a breakout change for #6460 since that PR changes mem2reg to use DIE to remove stores, but it needs this change to handle side-effectful instructions in the presence of loops. When loops are in the program and DIE is run, it previously could remove a store that would be used again next iteration of the loop.
This PR changes DIE to use a graph of strongly-connected components of blocks and to operate on every block within an SCC all at once. This requires a more traditional DIE algorithm which repeats until there are no more changes. This isn't necessary in ours currently since acir is always 1 block and normal scoping semantics prevent creating brillig programs which refer to the same instruction across multiple blocks (unless it is a store).
Additional Context
Currently a draft while I just verify it does work while merged into #6460, and to see if this has any brillig opcode regressions.
Documentation*
Check one:
PR Checklist*
cargo fmt
on default settings.