The least-significant bit of JALR target address should be set to zero

[colin4124]

The The RISC-V Instruction Set Manual: Volume I Version 2.0 Page 15, 2.5 Control Transfer Instructions writes that:

The indirect jump instruction JALR (jump and link register) uses the I-type encoding. The target
address is obtained by adding the 12-bit signed I-immediate to the register rs1, then setting the
least-significant bit of the result to zero.

I found id_stage.sv line 433:

`JT_JALR: jump_target = regfile_data_ra_id + imm_i_type;

It does not set the least-significant bit of the result to zero.

Maybe you does it but I have found that ?

[atraber]

You are correct, we definitely missed that.
Luckily the compiler has never issued any instructions that would have had the LSB set, so we never noticed.

We have fixed this issue internally and will push it to github soon.

Good catch! thanks a lot