GPIO Register access #15342
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Hi, I have the address values of GPIO_OUT_REG and GPIO_ENABLE_REG that work with an ESP32 Dev Kit V1 but the register addresses of the ESP32 S2 and ESP32 S3 appear to be different. Can anyone tell me what those addresses are, any information would be appreciated. |
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The source of this information are the respective Reference Manuals. The target address is base_address + Offset. The offset for GPIO_OUT_REG is 0x04, for GPIO_ENABLE_REG is 0x20. At the S2, there are two base addresses listed, 0x3f40_4000 and 0x6000_4000, at the S3 I read 0x6000_4000 for the base address. |
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The source of this information are the respective Reference Manuals.
The target address is base_address + Offset. The offset for GPIO_OUT_REG is 0x04, for GPIO_ENABLE_REG is 0x20. At the S2, there are two base addresses listed, 0x3f40_4000 and 0x6000_4000, at the S3 I read 0x6000_4000 for the base address.