[rtl872x] fixes DMA enabled USART flush #2800
Merged
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Problem
Serial2.flush()
onP2/Photon2
does not wait for bytes to be emptied from USART buffer on D4 (Serial2 TX), but instead when DMA transfer is complete.Solution
busy_
flag, to assist in waiting long enough for all bytes to be transmitted when busy waiting withSerial2.flush()
Steps to Test
TEST=wiring/no_fixture
TEST=wiring/serial_loopback2
(with TX jumpered to RX)Example App
References
Completeness