boards: mimxrt: enable pps output

Enable pps output for mimxrt1050 and mimxrt1060 based boards for gptp sample application validation. Signed-off-by: Hake Huang <hake.huang@oss.nxp.com> Co-authored-by: Seb Laveze <sebastien.laveze@nxp.com> Signed-off-by: Xabier Marquiegui <xmarquiegui@ainguraiiot.com>
piotrParf · Feb 11, 2022 · 28ee068 · 28ee068
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diff --git a/boards/arm/mimxrt1050_evk/doc/index.rst b/boards/arm/mimxrt1050_evk/doc/index.rst
@@ -249,6 +249,10 @@ The MIMXRT1050 SoC has five pairs of pinmux/gpio controllers.
 +---------------+-----------------+---------------------------+
 | GPIO_SD_B0_05 | USDHC1_DATA3    | SD Card                   |
 +---------------+-----------------+---------------------------+
+| GPIO_AD_B1_02 | 1588_EVENT2_OUT | 1588                      |
++---------------+-----------------+---------------------------+
+| GPIO_AD_B1_03 | 1588_EVENT2_IN  | 1588                      |
++---------------+-----------------+---------------------------+
 
 .. note::
         In order to use the SPI peripheral on this board, resistors R278,

diff --git a/boards/arm/mimxrt1050_evk/pinmux.c b/boards/arm/mimxrt1050_evk/pinmux.c
@@ -283,6 +283,17 @@ static int mimxrt1050_evk_init(const struct device *dev)
 	/* pull up the ENET_INT before RESET. */
 	GPIO_WritePinOutput(GPIO1, 10, 1);
 	GPIO_WritePinOutput(GPIO1, 9, 0);
+
+#if defined(CONFIG_PTP_CLOCK_MCUX)
+	/* GPIO_AD_B1_02 is configured as 1588_EVENT2_OUT */
+	IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B1_02_ENET_1588_EVENT2_OUT, 0U);
+	/* GPIO_AD_B1_02 PAD functional properties */
+	IOMUXC_SetPinConfig(IOMUXC_GPIO_AD_B1_02_ENET_1588_EVENT2_OUT, 0x10B0u);
+	/* GPIO_AD_B1_03 is configured as 1588_EVENT2_IN */
+	IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B1_03_ENET_1588_EVENT2_IN, 0U);
+	/* GPIO_AD_B1_03 PAD functional properties */
+	IOMUXC_SetPinConfig(IOMUXC_GPIO_AD_B1_03_ENET_1588_EVENT2_IN, 0xB0E9);
+#endif
 #endif
 
 #if DT_NODE_HAS_STATUS(DT_NODELABEL(lcdif), okay) && CONFIG_DISPLAY

diff --git a/boards/arm/mimxrt1060_evk/doc/index.rst b/boards/arm/mimxrt1060_evk/doc/index.rst
@@ -265,6 +265,10 @@ The MIMXRT1060 SoC has five pairs of pinmux/gpio controllers.
 +---------------+-----------------+---------------------------+
 | GPIO_AD_B1_15 | SAI1_TX_SYNC    | I2S                       |
 +---------------+-----------------+---------------------------+
+| GPIO_AD_B1_02 | 1588_EVENT2_OUT | 1588                      |
++---------------+-----------------+---------------------------+
+| GPIO_AD_B1_03 | 1588_EVENT2_IN  | 1588                      |
++---------------+-----------------+---------------------------+
 
 .. note::
         In order to use the SPI peripheral on this board, resistors R278, R279,

diff --git a/boards/arm/mimxrt1060_evk/pinmux.c b/boards/arm/mimxrt1060_evk/pinmux.c
@@ -219,6 +219,18 @@ static int mimxrt1060_evk_init(const struct device *dev)
 	/* pull up the ENET_INT before RESET. */
 	GPIO_WritePinOutput(GPIO1, 10, 1);
 	GPIO_WritePinOutput(GPIO1, 9, 0);
+
+#if defined(CONFIG_PTP_CLOCK_MCUX)
+	/* GPIO_AD_B1_02 is configured as 1588_EVENT2_OUT */
+	IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B1_02_ENET_1588_EVENT2_OUT, 0U);
+	/* GPIO_AD_B1_02 PAD functional properties */
+	IOMUXC_SetPinConfig(IOMUXC_GPIO_AD_B1_02_ENET_1588_EVENT2_OUT, 0x10B0u);
+	/* GPIO_AD_B1_03 is configured as 1588_EVENT2_IN */
+	IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B1_03_ENET_1588_EVENT2_IN, 0U);
+	/* GPIO_AD_B1_03 PAD functional properties */
+	IOMUXC_SetPinConfig(IOMUXC_GPIO_AD_B1_03_ENET_1588_EVENT2_IN, 0xB0E9);
+#endif
+
 #endif
 
 #if DT_NODE_HAS_STATUS(DT_NODELABEL(lcdif), okay) && CONFIG_DISPLAY