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[RV64_DYNAREC][LA64_DYNAREC] Fixed various issues (#1940)
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* [RV64_DYNAREC] Fixed more issues for vector

* more fixes and optims

* more

* more

* more

* more
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@ksco
ksco authored Oct 14, 2024
1 parent cce4379 commit fc71ec9
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Showing 12 changed files with 57 additions and 52 deletions.
4 changes: 2 additions & 2 deletions src/dynarec/la64/dynarec_la64_00.c
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Expand Up @@ -1660,10 +1660,10 @@ uintptr_t dynarec64_00(dynarec_la64_t* dyn, uintptr_t addr, uintptr_t ip, int ni
ed = TO_LA64((nextop & 7) + (rex.b << 3));
MOV64xw(ed, i64);
} else { // mem <= i32
addr = geted(dyn, addr, ninst, nextop, &wback, x2, x1, &fixedaddress, rex, &lock, 0, 4);
addr = geted(dyn, addr, ninst, nextop, &wback, x2, x1, &fixedaddress, rex, &lock, 1, 4);
i64 = F32S;
if (i64) {
MOV64xw(x3, i64);
MOV64x(x3, i64);
ed = x3;
} else
ed = xZR;
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2 changes: 1 addition & 1 deletion src/dynarec/la64/dynarec_la64_64.c
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Expand Up @@ -408,7 +408,7 @@ uintptr_t dynarec64_64(dynarec_la64_t* dyn, uintptr_t addr, uintptr_t ip, int ni
addr = geted(dyn, addr, ninst, nextop, &wback, x2, x1, &fixedaddress, rex, NULL, 0, 4);
i64 = F32S;
if (i64) {
MOV64xw(x3, i64);
MOV64x(x3, i64);
ed = x3;
} else
ed = xZR;
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6 changes: 3 additions & 3 deletions src/dynarec/la64/dynarec_la64_f20f.c
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Expand Up @@ -129,7 +129,7 @@ uintptr_t dynarec64_F20F(dynarec_la64_t* dyn, uintptr_t addr, uintptr_t ip, int
if (!rex.w) ZEROUP(gd);
if (!box64_dynarec_fastround) {
MOVFCSR2GR(x5, FCSR2); // get back FPSR to check
MOV32w(x3, (1 << FR_V) | (1 << FR_O));
MOV32w(x3, (1 << FR_V));
AND(x5, x5, x3);
CBZ_NEXT(x5);
if (rex.w) {
Expand Down Expand Up @@ -160,7 +160,7 @@ uintptr_t dynarec64_F20F(dynarec_la64_t* dyn, uintptr_t addr, uintptr_t ip, int
x87_restoreround(dyn, ninst, u8);
if (!box64_dynarec_fastround) {
MOVFCSR2GR(x5, FCSR2); // get back FPSR to check
MOV32w(x3, (1 << FR_V) | (1 << FR_O));
MOV32w(x3, (1 << FR_V));
AND(x5, x5, x3);
CBZ_NEXT(x5);
if (rex.w) {
Expand Down Expand Up @@ -330,4 +330,4 @@ uintptr_t dynarec64_F20F(dynarec_la64_t* dyn, uintptr_t addr, uintptr_t ip, int
DEFAULT;
}
return addr;
}
}
6 changes: 3 additions & 3 deletions src/dynarec/la64/dynarec_la64_f30f.c
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Expand Up @@ -118,7 +118,7 @@ uintptr_t dynarec64_F30F(dynarec_la64_t* dyn, uintptr_t addr, uintptr_t ip, int
}
if (!box64_dynarec_fastround) {
MOVFCSR2GR(x5, FCSR2); // get back FPSR to check
MOV32w(x3, (1 << FR_V) | (1 << FR_O));
MOV32w(x3, (1 << FR_V));
AND(x5, x5, x3);
CBZ_NEXT(x5);
if (rex.w) {
Expand Down Expand Up @@ -151,7 +151,7 @@ uintptr_t dynarec64_F30F(dynarec_la64_t* dyn, uintptr_t addr, uintptr_t ip, int
x87_restoreround(dyn, ninst, u8);
if (!box64_dynarec_fastround) {
MOVFCSR2GR(x5, FCSR2); // get back FPSR to check
MOV32w(x3, (1 << FR_V) | (1 << FR_O));
MOV32w(x3, (1 << FR_V));
AND(x5, x5, x3);
CBZ_NEXT(x5);
if (rex.w) {
Expand Down Expand Up @@ -381,4 +381,4 @@ uintptr_t dynarec64_F30F(dynarec_la64_t* dyn, uintptr_t addr, uintptr_t ip, int
DEFAULT;
}
return addr;
}
}
6 changes: 3 additions & 3 deletions src/dynarec/rv64/dynarec_rv64_00_3.c
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Expand Up @@ -335,7 +335,7 @@ uintptr_t dynarec64_00_3(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int
ORI(eb1, eb1, u8);
}
} else { // mem <= u8
addr = geted(dyn, addr, ninst, nextop, &wback, x2, x1, &fixedaddress, rex, &lock, 0, 1);
addr = geted(dyn, addr, ninst, nextop, &wback, x2, x1, &fixedaddress, rex, &lock, 1, 1);
u8 = F8;
if(u8) {
ADDI(x3, xZR, u8);
Expand All @@ -354,10 +354,10 @@ uintptr_t dynarec64_00_3(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int
ed = xRAX+(nextop&7)+(rex.b<<3);
MOV64xw(ed, i64);
} else { // mem <= i32
addr = geted(dyn, addr, ninst, nextop, &wback, x2, x1, &fixedaddress, rex, &lock, 0, 4);
addr = geted(dyn, addr, ninst, nextop, &wback, x2, x1, &fixedaddress, rex, &lock, 1, 4);
i64 = F32S;
if(i64) {
MOV64xw(x3, i64);
MOV64x(x3, i64);
ed = x3;
} else
ed = xZR;
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2 changes: 1 addition & 1 deletion src/dynarec/rv64/dynarec_rv64_64.c
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Original file line number Diff line number Diff line change
Expand Up @@ -517,7 +517,7 @@ uintptr_t dynarec64_64(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int ni
addr = geted(dyn, addr, ninst, nextop, &wback, x2, x1, &fixedaddress, rex, NULL, 1, 4);
i64 = F32S;
if(i64) {
MOV64xw(x3, i64);
MOV64x(x3, i64);
ed = x3;
} else
ed = xZR;
Expand Down
4 changes: 2 additions & 2 deletions src/dynarec/rv64/dynarec_rv64_660f_vector.c
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Expand Up @@ -1384,9 +1384,9 @@ uintptr_t dynarec64_660F_vector(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t i
ed = xRAX + (nextop & 7) + (rex.b << 3);
} else {
SMREAD();
addr = geted(dyn, addr, ninst, nextop, &ed, x2, x3, &fixedaddress, rex, NULL, 0, 1);
addr = geted(dyn, addr, ninst, nextop, &ed, x2, x3, &fixedaddress, rex, NULL, 1, 1);
u8 = (F8) & 7;
LHU(x4, ed, 0);
LHU(x4, ed, fixedaddress);
ed = x4;
}
vector_loadmask(dyn, ninst, VMASK, (1 << u8), x5, 1);
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4 changes: 2 additions & 2 deletions src/dynarec/rv64/dynarec_rv64_67.c
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Expand Up @@ -698,9 +698,9 @@ uintptr_t dynarec64_67(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int ni
ed = xRAX + (nextop & 7) + (rex.b << 3);
MOV64xw(ed, i64);
} else { // mem <= i32
addr = geted32(dyn, addr, ninst, nextop, &ed, x2, x1, &fixedaddress, rex, &lock, 1, 0);
addr = geted32(dyn, addr, ninst, nextop, &ed, x2, x1, &fixedaddress, rex, &lock, 1, 4);
i64 = F32S;
MOV64xw(x3, i64);
MOV64x(x3, i64);
SDxw(x3, ed, fixedaddress);
SMWRITELOCK(lock);
}
Expand Down
12 changes: 6 additions & 6 deletions src/dynarec/rv64/dynarec_rv64_f20f.c
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Original file line number Diff line number Diff line change
Expand Up @@ -105,14 +105,13 @@ uintptr_t dynarec64_F20F(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int
GETGD;
GETEXSD(v0, 0);
if(!box64_dynarec_fastround) {
FSFLAGSI(0); // // reset all bits
FSFLAGSI(0); // reset all bits
}
FCVTLDxw(gd, v0, RD_RTZ);
if(!rex.w)
ZEROUP(gd);
if (!rex.w) ZEROUP(gd);
if(!box64_dynarec_fastround) {
FRFLAGS(x5); // get back FPSR to check the IOC bit
ANDI(x5, x5, (1<<FR_NV)|(1<<FR_OF));
FRFLAGS(x5); // get back FPSR to check the IOC bit
ANDI(x5, x5, (1 << FR_NV));
CBZ_NEXT(x5);
if(rex.w) {
MOV64x(gd, 0x8000000000000000LL);
Expand All @@ -131,10 +130,11 @@ uintptr_t dynarec64_F20F(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int
}
u8 = sse_setround(dyn, ninst, x2, x3);
FCVTLDxw(gd, v0, RD_DYN);
if (!rex.w) ZEROUP(gd);
x87_restoreround(dyn, ninst, u8);
if(!box64_dynarec_fastround) {
FRFLAGS(x5); // get back FPSR to check the IOC bit
ANDI(x5, x5, (1<<FR_NV)|(1<<FR_OF));
ANDI(x5, x5, (1 << FR_NV));
CBZ_NEXT(x5);
if(rex.w) {
MOV64x(gd, 0x8000000000000000LL);
Expand Down
11 changes: 7 additions & 4 deletions src/dynarec/rv64/dynarec_rv64_f20f_vector.c
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Original file line number Diff line number Diff line change
Expand Up @@ -147,7 +147,7 @@ uintptr_t dynarec64_F20F_vector(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t i
FCVTLDxw(gd, v0, RD_RTZ);
if (!rex.w) ZEROUP(gd);
FRFLAGS(x5); // get back FPSR to check the IOC bit
ANDI(x5, x5, (1 << FR_NV) | (1 << FR_OF));
ANDI(x5, x5, (1 << FR_NV));
CBZ_NEXT(x5);
if (rex.w) {
MOV64x(gd, 0x8000000000000000LL);
Expand All @@ -161,7 +161,7 @@ uintptr_t dynarec64_F20F_vector(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t i
nextop = F8;
GETGD;
if (MODREG) {
SET_ELEMENT_WIDTH(x1, (rex.w ? VECTOR_SEW64 : VECTOR_SEW32), 1);
SET_ELEMENT_WIDTH(x1, VECTOR_SEW64, 1);
v0 = sse_get_reg_vector(dyn, ninst, x1, (nextop & 7) + (rex.b << 3), 0, dyn->vector_eew);
} else {
SMREAD();
Expand All @@ -170,21 +170,23 @@ uintptr_t dynarec64_F20F_vector(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t i
addr = geted(dyn, addr, ninst, nextop, &ed, x1, x2, &fixedaddress, rex, NULL, 0, 0);
vector_loadmask(dyn, ninst, VMASK, 0xFF, x4, 1);
VLE8_V(v0, ed, VECTOR_MASKED, VECTOR_NFIELD1);
SET_ELEMENT_WIDTH(x1, (rex.w ? VECTOR_SEW64 : VECTOR_SEW32), 1);
SET_ELEMENT_WIDTH(x1, VECTOR_SEW64, 1);
}
if (box64_dynarec_fastround) {
VFMV_F_S(v0, v0);
u8 = sse_setround(dyn, ninst, x2, x3);
FCVTLDxw(gd, v0, RD_DYN);
if (!rex.w) ZEROUP(gd);
x87_restoreround(dyn, ninst, u8);
} else {
VFMV_F_S(v0, v0);
FSFLAGSI(0); // // reset all bits
u8 = sse_setround(dyn, ninst, x2, x3);
FCVTLDxw(gd, v0, RD_DYN);
if (!rex.w) ZEROUP(gd);
x87_restoreround(dyn, ninst, u8);
FRFLAGS(x5); // get back FPSR to check the IOC bit
ANDI(x5, x5, (1 << FR_NV) | (1 << FR_OF));
ANDI(x5, x5, (1 << FR_NV));
CBZ_NEXT(x5);
if (rex.w) {
MOV64x(gd, 0x8000000000000000LL);
Expand Down Expand Up @@ -230,6 +232,7 @@ uintptr_t dynarec64_F20F_vector(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t i
if (rv64_xtheadvector) {
d0 = fpu_get_scratch(dyn);
VFMV_S_F(d0, v0);
vector_loadmask(dyn, ninst, VMASK, 0b01, x4, 1);
VMERGE_VVM(v0, v0, d0); // implies VMASK
} else {
VFMV_S_F(v0, v0);
Expand Down
1 change: 1 addition & 0 deletions src/dynarec/rv64/dynarec_rv64_f30f_vector.c
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Original file line number Diff line number Diff line change
Expand Up @@ -162,6 +162,7 @@ uintptr_t dynarec64_F30F_vector(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t i
if (rv64_xtheadvector) {
d0 = fpu_get_scratch(dyn);
VFMV_S_F(d0, v0);
vector_loadmask(dyn, ninst, VMASK, 0b0001, x4, 1);
VMERGE_VVM(v0, v0, d0); // implies VMASK
} else {
VFMV_S_F(v0, v0);
Expand Down
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