Fix verilog ling. #21
yvantorAnnotations
1 error and 325 warnings
|
lint-sv
Process completed with exit code 1.
|
|
lint-license
Node.js 16 actions are deprecated. Please update the following actions to use Node.js 20: actions/checkout@v3, actions/setup-python@v2. For more information see: https://github.blog/changelog/2023-09-22-github-actions-transitioning-from-node-16-to-node-20/.
|
|
lint-license
The following actions uses node12 which is deprecated and will be forced to run on node16: actions/setup-python@v2. For more info: https://github.blog/changelog/2023-06-13-github-actions-all-actions-will-run-on-node16-instead-of-node12-by-default/
|
|
lint-cxx
Node.js 16 actions are deprecated. Please update the following actions to use Node.js 20: actions/checkout@v3. For more information see: https://github.blog/changelog/2023-09-22-github-actions-transitioning-from-node-16-to-node-20/.
|
|
[verible-verilog-lint] rtl/redmule_noncomp.sv#L33:
rtl/redmule_noncomp.sv#L33
Remove trailing spaces. [Style: trailing-spaces] [no-trailing-spaces]
|
|
[verible-verilog-lint] rtl/redmule_noncomp.sv#L53:
rtl/redmule_noncomp.sv#L53
Non-type localparam names must be styled with CamelCase [Style: constants] [parameter-name-style]
|
|
[verible-verilog-lint] rtl/redmule_noncomp.sv#L54:
rtl/redmule_noncomp.sv#L54
Non-type localparam names must be styled with CamelCase [Style: constants] [parameter-name-style]
|
|
[verible-verilog-lint] rtl/redmule_noncomp.sv#L56:
rtl/redmule_noncomp.sv#L56
Explicitly define a storage type for every parameter and localparam, (NUM_INP_REGS). [Style: constants] [explicit-parameter-storage-type]
|
|
[verible-verilog-lint] rtl/redmule_noncomp.sv#L61:
rtl/redmule_noncomp.sv#L61
Explicitly define a storage type for every parameter and localparam, (NUM_OUT_REGS). [Style: constants] [explicit-parameter-storage-type]
|
|
[verible-verilog-lint] rtl/redmule_noncomp.sv#L80:
rtl/redmule_noncomp.sv#L80
Declare packed dimension range in little-endian (decreasing) order, e.g. [N-1:0]. [Style: packed-ordering] [packed-dimensions-range-ordering]
|
|
[verible-verilog-lint] rtl/redmule_noncomp.sv#L81:
rtl/redmule_noncomp.sv#L81
Declare packed dimension range in little-endian (decreasing) order, e.g. [N-1:0]. [Style: packed-ordering] [packed-dimensions-range-ordering]
|
|
[verible-verilog-lint] rtl/redmule_noncomp.sv#L82:
rtl/redmule_noncomp.sv#L82
Declare packed dimension range in little-endian (decreasing) order, e.g. [N-1:0]. [Style: packed-ordering] [packed-dimensions-range-ordering]
|
|
[verible-verilog-lint] rtl/redmule_noncomp.sv#L83:
rtl/redmule_noncomp.sv#L83
Declare packed dimension range in little-endian (decreasing) order, e.g. [N-1:0]. [Style: packed-ordering] [packed-dimensions-range-ordering]
|
|
[verible-verilog-lint] rtl/redmule_noncomp.sv#L84:
rtl/redmule_noncomp.sv#L84
Declare packed dimension range in little-endian (decreasing) order, e.g. [N-1:0]. [Style: packed-ordering] [packed-dimensions-range-ordering]
|
|
[verible-verilog-lint] rtl/redmule_noncomp.sv#L85:
rtl/redmule_noncomp.sv#L85
Declare packed dimension range in little-endian (decreasing) order, e.g. [N-1:0]. [Style: packed-ordering] [packed-dimensions-range-ordering]
|
|
[verible-verilog-lint] rtl/redmule_noncomp.sv#L86:
rtl/redmule_noncomp.sv#L86
Declare packed dimension range in little-endian (decreasing) order, e.g. [N-1:0]. [Style: packed-ordering] [packed-dimensions-range-ordering]
|
|
[verible-verilog-lint] rtl/redmule_noncomp.sv#L87:
rtl/redmule_noncomp.sv#L87
Declare packed dimension range in little-endian (decreasing) order, e.g. [N-1:0]. [Style: packed-ordering] [packed-dimensions-range-ordering]
|
|
[verible-verilog-lint] rtl/redmule_noncomp.sv#L89:
rtl/redmule_noncomp.sv#L89
Declare packed dimension range in little-endian (decreasing) order, e.g. [N-1:0]. [Style: packed-ordering] [packed-dimensions-range-ordering]
|
|
[verible-verilog-lint] rtl/redmule_noncomp.sv#L111:
rtl/redmule_noncomp.sv#L111
Line length exceeds max: 100; is: 105 [Style: line-length] [line-length]
|
|
[verible-verilog-lint] rtl/redmule_noncomp.sv#L349:
rtl/redmule_noncomp.sv#L349
Declare packed dimension range in little-endian (decreasing) order, e.g. [N-1:0]. [Style: packed-ordering] [packed-dimensions-range-ordering]
|
|
[verible-verilog-lint] rtl/redmule_noncomp.sv#L350:
rtl/redmule_noncomp.sv#L350
Declare packed dimension range in little-endian (decreasing) order, e.g. [N-1:0]. [Style: packed-ordering] [packed-dimensions-range-ordering]
|
|
[verible-verilog-lint] rtl/redmule_noncomp.sv#L351:
rtl/redmule_noncomp.sv#L351
Declare packed dimension range in little-endian (decreasing) order, e.g. [N-1:0]. [Style: packed-ordering] [packed-dimensions-range-ordering]
|
|
[verible-verilog-lint] rtl/redmule_noncomp.sv#L352:
rtl/redmule_noncomp.sv#L352
Declare packed dimension range in little-endian (decreasing) order, e.g. [N-1:0]. [Style: packed-ordering] [packed-dimensions-range-ordering]
|
|
[verible-verilog-lint] rtl/redmule_noncomp.sv#L353:
rtl/redmule_noncomp.sv#L353
Declare packed dimension range in little-endian (decreasing) order, e.g. [N-1:0]. [Style: packed-ordering] [packed-dimensions-range-ordering]
|
|
[verible-verilog-lint] rtl/redmule_noncomp.sv#L354:
rtl/redmule_noncomp.sv#L354
Declare packed dimension range in little-endian (decreasing) order, e.g. [N-1:0]. [Style: packed-ordering] [packed-dimensions-range-ordering]
|
|
[verible-verilog-lint] rtl/redmule_noncomp.sv#L355:
rtl/redmule_noncomp.sv#L355
Declare packed dimension range in little-endian (decreasing) order, e.g. [N-1:0]. [Style: packed-ordering] [packed-dimensions-range-ordering]
|
|
[verible-verilog-lint] rtl/redmule_noncomp.sv#L356:
rtl/redmule_noncomp.sv#L356
Declare packed dimension range in little-endian (decreasing) order, e.g. [N-1:0]. [Style: packed-ordering] [packed-dimensions-range-ordering]
|
|
[verible-verilog-lint] rtl/redmule_noncomp.sv#L358:
rtl/redmule_noncomp.sv#L358
Declare packed dimension range in little-endian (decreasing) order, e.g. [N-1:0]. [Style: packed-ordering] [packed-dimensions-range-ordering]
|
|
[verible-verilog-lint] rtl/redmule_noncomp.sv#L380:
rtl/redmule_noncomp.sv#L380
Line length exceeds max: 100; is: 105 [Style: line-length] [line-length]
|
|
[verible-verilog-lint] rtl/redmule_pkg.sv#L60:
rtl/redmule_pkg.sv#L60
Remove trailing spaces. [Style: trailing-spaces] [no-trailing-spaces]
|
|
[verible-verilog-lint] rtl/redmule_pkg.sv#L62:
rtl/redmule_pkg.sv#L62
Remove trailing spaces. [Style: trailing-spaces] [no-trailing-spaces]
|
|
[verible-verilog-lint] rtl/redmule_pkg.sv#L202:
rtl/redmule_pkg.sv#L202
Remove trailing spaces. [Style: trailing-spaces] [no-trailing-spaces]
|
|
[verible-verilog-lint] rtl/redmule_castin.sv#L15:
rtl/redmule_castin.sv#L15
Non-type parameter names must be styled with CamelCase or ALL_CAPS [Style: constants] [parameter-name-style]
|
|
[verible-verilog-lint] rtl/redmule_castin.sv#L34:
rtl/redmule_castin.sv#L34
Non-type localparam names must be styled with CamelCase [Style: constants] [parameter-name-style]
|
|
[verible-verilog-lint] rtl/redmule_castin.sv#L38:
rtl/redmule_castin.sv#L38
Non-type localparam names must be styled with CamelCase [Style: constants] [parameter-name-style]
|
|
[verible-verilog-lint] rtl/redmule_castin.sv#L50:
rtl/redmule_castin.sv#L50
All generate block labels must start with g_ or gen_ [Style: generate-constructs] [generate-label-prefix]
|
|
[verible-verilog-lint] rtl/redmule_castin.sv#L53:
rtl/redmule_castin.sv#L53
Remove trailing spaces. [Style: trailing-spaces] [no-trailing-spaces]
|
|
[verible-verilog-lint] rtl/redmule_castin.sv#L84:
rtl/redmule_castin.sv#L84
Remove trailing spaces. [Style: trailing-spaces] [no-trailing-spaces]
|
|
[verible-verilog-lint] rtl/redmule_castin.sv#L86:
rtl/redmule_castin.sv#L86
Remove trailing spaces. [Style: trailing-spaces] [no-trailing-spaces]
|
|
[verible-verilog-lint] rtl/redmule_castin.sv#L88:
rtl/redmule_castin.sv#L88
Remove trailing spaces. [Style: trailing-spaces] [no-trailing-spaces]
|
|
[verible-verilog-lint] rtl/redmule_complex.sv#L18:
rtl/redmule_complex.sv#L18
Line length exceeds max: 100; is: 102 [Style: line-length] [line-length]
|
|
[verible-verilog-lint] rtl/redmule_complex.sv#L21:
rtl/redmule_complex.sv#L21
Line length exceeds max: 100; is: 103 [Style: line-length] [line-length]
|
|
[verible-verilog-lint] rtl/redmule_complex.sv#L34:
rtl/redmule_complex.sv#L34
Line length exceeds max: 100; is: 103 [Style: line-length] [line-length]
|
|
[verible-verilog-lint] rtl/redmule_complex.sv#L37:
rtl/redmule_complex.sv#L37
Line length exceeds max: 100; is: 117 [Style: line-length] [line-length]
|
|
[verible-verilog-lint] rtl/redmule_complex.sv#L39:
rtl/redmule_complex.sv#L39
Line length exceeds max: 100; is: 109 [Style: line-length] [line-length]
|
|
[verible-verilog-lint] rtl/redmule_complex.sv#L65:
rtl/redmule_complex.sv#L65
Line length exceeds max: 100; is: 107 [Style: line-length] [line-length]
|
|
[verible-verilog-lint] rtl/redmule_complex.sv#L125:
rtl/redmule_complex.sv#L125
Line length exceeds max: 100; is: 107 [Style: line-length] [line-length]
|
|
[verible-verilog-lint] rtl/redmule_ctrl.sv#L22:
rtl/redmule_ctrl.sv#L22
Non-type localparam names must be styled with CamelCase [Style: constants] [parameter-name-style]
|
|
[verible-verilog-lint] rtl/redmule_ctrl.sv#L23:
rtl/redmule_ctrl.sv#L23
Non-type localparam names must be styled with CamelCase [Style: constants] [parameter-name-style]
|
|
[verible-verilog-lint] rtl/redmule_ctrl.sv#L23:
rtl/redmule_ctrl.sv#L23
Remove trailing spaces. [Style: trailing-spaces] [no-trailing-spaces]
|
|
[verible-verilog-lint] rtl/redmule_ctrl.sv#L65:
rtl/redmule_ctrl.sv#L65
Line length exceeds max: 100; is: 152 [Style: line-length] [line-length]
|
|
[verible-verilog-lint] rtl/redmule_ctrl.sv#L65:
rtl/redmule_ctrl.sv#L65
Enum names must use lower_snake_case naming convention and end with _t or _e. [Style: enumerations] [enum-name-style]
|
|
[verible-verilog-lint] rtl/redmule_ctrl.sv#L112:
rtl/redmule_ctrl.sv#L112
Remove trailing spaces. [Style: trailing-spaces] [no-trailing-spaces]
|
|
[verible-verilog-lint] rtl/redmule_ctrl.sv#L124:
rtl/redmule_ctrl.sv#L124
Remove trailing spaces. [Style: trailing-spaces] [no-trailing-spaces]
|
|
[verible-verilog-lint] rtl/redmule_ctrl.sv#L131:
rtl/redmule_ctrl.sv#L131
Remove trailing spaces. [Style: trailing-spaces] [no-trailing-spaces]
|
|
[verible-verilog-lint] rtl/redmule_ctrl.sv#L198:
rtl/redmule_ctrl.sv#L198
Remove trailing spaces. [Style: trailing-spaces] [no-trailing-spaces]
|
|
[verible-verilog-lint] rtl/redmule_ctrl.sv#L222:
rtl/redmule_ctrl.sv#L222
Remove trailing spaces. [Style: trailing-spaces] [no-trailing-spaces]
|
|
[verible-verilog-lint] rtl/redmule_ctrl.sv#L252:
rtl/redmule_ctrl.sv#L252
Remove trailing spaces. [Style: trailing-spaces] [no-trailing-spaces]
|
|
[verible-verilog-lint] rtl/redmule_ctrl.sv#L281:
rtl/redmule_ctrl.sv#L281
Explicitly define a default case for every case statement. [Style: case-statements] [case-missing-default]
|
|
[verible-verilog-lint] rtl/redmule_ctrl.sv#L293:
rtl/redmule_ctrl.sv#L293
Remove trailing spaces. [Style: trailing-spaces] [no-trailing-spaces]
|
|
[verible-verilog-lint] rtl/redmule_ctrl.sv#L296:
rtl/redmule_ctrl.sv#L296
Remove trailing spaces. [Style: trailing-spaces] [no-trailing-spaces]
|
|
[verible-verilog-lint] rtl/redmule_ctrl.sv#L310:
rtl/redmule_ctrl.sv#L310
Remove trailing spaces. [Style: trailing-spaces] [no-trailing-spaces]
|
|
[verible-verilog-lint] rtl/redmule_ctrl.sv#L319:
rtl/redmule_ctrl.sv#L319
Remove trailing spaces. [Style: trailing-spaces] [no-trailing-spaces]
|
|
[verible-verilog-lint] rtl/redmule_ctrl.sv#L321:
rtl/redmule_ctrl.sv#L321
Explicitly define a default case for every case statement. [Style: case-statements] [case-missing-default]
|
|
[verible-verilog-lint] rtl/redmule_ctrl.sv#L346:
rtl/redmule_ctrl.sv#L346
Remove trailing spaces. [Style: trailing-spaces] [no-trailing-spaces]
|
|
[verible-verilog-lint] rtl/redmule_ctrl.sv#L361:
rtl/redmule_ctrl.sv#L361
Remove trailing spaces. [Style: trailing-spaces] [no-trailing-spaces]
|
|
[verible-verilog-lint] rtl/redmule_ctrl.sv#L364:
rtl/redmule_ctrl.sv#L364
Remove trailing spaces. [Style: trailing-spaces] [no-trailing-spaces]
|
|
[verible-verilog-lint] rtl/redmule_ctrl.sv#L380:
rtl/redmule_ctrl.sv#L380
Remove trailing spaces. [Style: trailing-spaces] [no-trailing-spaces]
|
|
[verible-verilog-lint] rtl/redmule_ctrl.sv#L402:
rtl/redmule_ctrl.sv#L402
Remove trailing spaces. [Style: trailing-spaces] [no-trailing-spaces]
|
|
[verible-verilog-lint] rtl/redmule_castout.sv#L15:
rtl/redmule_castout.sv#L15
Non-type parameter names must be styled with CamelCase or ALL_CAPS [Style: constants] [parameter-name-style]
|
|
[verible-verilog-lint] rtl/redmule_castout.sv#L34:
rtl/redmule_castout.sv#L34
Non-type localparam names must be styled with CamelCase [Style: constants] [parameter-name-style]
|
|
[verible-verilog-lint] rtl/redmule_castout.sv#L38:
rtl/redmule_castout.sv#L38
Non-type localparam names must be styled with CamelCase [Style: constants] [parameter-name-style]
|
|
[verible-verilog-lint] rtl/redmule_castout.sv#L46:
rtl/redmule_castout.sv#L46
All generate block labels must start with g_ or gen_ [Style: generate-constructs] [generate-label-prefix]
|
|
[verible-verilog-lint] rtl/redmule_castout.sv#L49:
rtl/redmule_castout.sv#L49
Remove trailing spaces. [Style: trailing-spaces] [no-trailing-spaces]
|
|
[verible-verilog-lint] rtl/redmule_castout.sv#L80:
rtl/redmule_castout.sv#L80
Remove trailing spaces. [Style: trailing-spaces] [no-trailing-spaces]
|
|
[verible-verilog-lint] rtl/redmule_castout.sv#L82:
rtl/redmule_castout.sv#L82
Remove trailing spaces. [Style: trailing-spaces] [no-trailing-spaces]
|
|
[verible-verilog-lint] rtl/redmule_castout.sv#L84:
rtl/redmule_castout.sv#L84
Remove trailing spaces. [Style: trailing-spaces] [no-trailing-spaces]
|
|
[verible-verilog-lint] rtl/redmule_wrap.sv#L21:
rtl/redmule_wrap.sv#L21
Line length exceeds max: 100; is: 103 [Style: line-length] [line-length]
|
|
[verible-verilog-lint] rtl/redmule_wrap.sv#L23:
rtl/redmule_wrap.sv#L23
Line length exceeds max: 100; is: 103 [Style: line-length] [line-length]
|
|
[verible-verilog-lint] rtl/redmule_wrap.sv#L26:
rtl/redmule_wrap.sv#L26
Line length exceeds max: 100; is: 117 [Style: line-length] [line-length]
|
|
[verible-verilog-lint] rtl/redmule_wrap.sv#L28:
rtl/redmule_wrap.sv#L28
Line length exceeds max: 100; is: 106 [Style: line-length] [line-length]
|
|
[verible-verilog-lint] rtl/redmule_wrap.sv#L61:
rtl/redmule_wrap.sv#L61
Line length exceeds max: 100; is: 125 [Style: line-length] [line-length]
|
|
[verible-verilog-lint] rtl/redmule_wrap.sv#L63:
rtl/redmule_wrap.sv#L63
Line length exceeds max: 100; is: 101 [Style: line-length] [line-length]
|
|
[verible-verilog-lint] rtl/redmule_wrap.sv#L135:
rtl/redmule_wrap.sv#L135
All generate block labels must start with g_ or gen_ [Style: generate-constructs] [generate-label-prefix]
|
|
[verible-verilog-lint] rtl/redmule_w_buffer.sv#L15:
rtl/redmule_w_buffer.sv#L15
Remove trailing spaces. [Style: trailing-spaces] [no-trailing-spaces]
|
|
[verible-verilog-lint] rtl/redmule_w_buffer.sv#L15:
rtl/redmule_w_buffer.sv#L15
Line length exceeds max: 100; is: 119 [Style: line-length] [line-length]
|
|
[verible-verilog-lint] rtl/redmule_w_buffer.sv#L52:
rtl/redmule_w_buffer.sv#L52
Remove trailing spaces. [Style: trailing-spaces] [no-trailing-spaces]
|
|
[verible-verilog-lint] rtl/redmule_w_buffer.sv#L53:
rtl/redmule_w_buffer.sv#L53
Remove trailing spaces. [Style: trailing-spaces] [no-trailing-spaces]
|
|
[verible-verilog-lint] rtl/redmule_w_buffer.sv#L61:
rtl/redmule_w_buffer.sv#L61
Use spaces, not tabs. [Style: tabs] [no-tabs]
|
|
[verible-verilog-lint] rtl/redmule_w_buffer.sv#L65:
rtl/redmule_w_buffer.sv#L65
Remove trailing spaces. [Style: trailing-spaces] [no-trailing-spaces]
|
|
[verible-verilog-lint] rtl/redmule_w_buffer.sv#L67:
rtl/redmule_w_buffer.sv#L67
Use spaces, not tabs. [Style: tabs] [no-tabs]
|
|
[verible-verilog-lint] rtl/redmule_z_buffer.sv#L15:
rtl/redmule_z_buffer.sv#L15
Line length exceeds max: 100; is: 139 [Style: line-length] [line-length]
|
|
[verible-verilog-lint] rtl/redmule_z_buffer.sv#L15:
rtl/redmule_z_buffer.sv#L15
Remove trailing spaces. [Style: trailing-spaces] [no-trailing-spaces]
|
|
[verible-verilog-lint] rtl/redmule_z_buffer.sv#L66:
rtl/redmule_z_buffer.sv#L66
Use spaces, not tabs. [Style: tabs] [no-tabs]
|
|
[verible-verilog-lint] rtl/redmule_z_buffer.sv#L67:
rtl/redmule_z_buffer.sv#L67
Use spaces, not tabs. [Style: tabs] [no-tabs]
|
|
[verible-verilog-lint] rtl/redmule_z_buffer.sv#L68:
rtl/redmule_z_buffer.sv#L68
Use spaces, not tabs. [Style: tabs] [no-tabs]
|
|
[verible-verilog-lint] rtl/redmule_z_buffer.sv#L68:
rtl/redmule_z_buffer.sv#L68
Line length exceeds max: 100; is: 106 [Style: line-length] [line-length]
|
|
[verible-verilog-lint] rtl/redmule_z_buffer.sv#L85:
rtl/redmule_z_buffer.sv#L85
Remove trailing spaces. [Style: trailing-spaces] [no-trailing-spaces]
|
|
[verible-verilog-lint] rtl/redmule_z_buffer.sv#L111:
rtl/redmule_z_buffer.sv#L111
Remove trailing spaces. [Style: trailing-spaces] [no-trailing-spaces]
|
|
[verible-verilog-lint] rtl/redmule_z_buffer.sv#L121:
rtl/redmule_z_buffer.sv#L121
Use spaces, not tabs. [Style: tabs] [no-tabs]
|
|
[verible-verilog-lint] rtl/redmule_z_buffer.sv#L122:
rtl/redmule_z_buffer.sv#L122
Use spaces, not tabs. [Style: tabs] [no-tabs]
|
|
[verible-verilog-lint] rtl/redmule_z_buffer.sv#L137:
rtl/redmule_z_buffer.sv#L137
Remove trailing spaces. [Style: trailing-spaces] [no-trailing-spaces]
|
|
[verible-verilog-lint] rtl/redmule_row.sv#L12:
rtl/redmule_row.sv#L12
Line length exceeds max: 100; is: 107 [Style: line-length] [line-length]
|
|
[verible-verilog-lint] rtl/redmule_row.sv#L17:
rtl/redmule_row.sv#L17
Line length exceeds max: 100; is: 121 [Style: line-length] [line-length]
|
|
[verible-verilog-lint] rtl/redmule_row.sv#L22:
rtl/redmule_row.sv#L22
Remove trailing spaces. [Style: trailing-spaces] [no-trailing-spaces]
|
|
[verible-verilog-lint] rtl/redmule_row.sv#L26:
rtl/redmule_row.sv#L26
Remove trailing spaces. [Style: trailing-spaces] [no-trailing-spaces]
|
|
[verible-verilog-lint] rtl/redmule_row.sv#L28:
rtl/redmule_row.sv#L28
Remove trailing spaces. [Style: trailing-spaces] [no-trailing-spaces]
|
|
[verible-verilog-lint] rtl/redmule_row.sv#L50:
rtl/redmule_row.sv#L50
Remove trailing spaces. [Style: trailing-spaces] [no-trailing-spaces]
|
|
[verible-verilog-lint] rtl/redmule_row.sv#L53:
rtl/redmule_row.sv#L53
Remove trailing spaces. [Style: trailing-spaces] [no-trailing-spaces]
|
|
[verible-verilog-lint] rtl/redmule_row.sv#L69:
rtl/redmule_row.sv#L69
All generate block labels must start with g_ or gen_ [Style: generate-constructs] [generate-label-prefix]
|
|
[verible-verilog-lint] rtl/redmule_row.sv#L72:
rtl/redmule_row.sv#L72
Remove trailing spaces. [Style: trailing-spaces] [no-trailing-spaces]
|
|
[verible-verilog-lint] rtl/redmule_row.sv#L76:
rtl/redmule_row.sv#L76
Remove trailing spaces. [Style: trailing-spaces] [no-trailing-spaces]
|
|
[verible-verilog-lint] rtl/redmule_row.sv#L112:
rtl/redmule_row.sv#L112
All generate block labels must start with g_ or gen_ [Style: generate-constructs] [generate-label-prefix]
|
|
[verible-verilog-lint] rtl/redmule_row.sv#L124:
rtl/redmule_row.sv#L124
Remove trailing spaces. [Style: trailing-spaces] [no-trailing-spaces]
|
|
[verible-verilog-lint] rtl/redmule_streamer.sv#L34:
rtl/redmule_streamer.sv#L34
Remove trailing spaces. [Style: trailing-spaces] [no-trailing-spaces]
|
|
[verible-verilog-lint] rtl/redmule_streamer.sv#L78:
rtl/redmule_streamer.sv#L78
Remove trailing spaces. [Style: trailing-spaces] [no-trailing-spaces]
|
|
[verible-verilog-lint] rtl/redmule_streamer.sv#L188:
rtl/redmule_streamer.sv#L188
Line length exceeds max: 100; is: 103 [Style: line-length] [line-length]
|
|
[verible-verilog-lint] rtl/redmule_streamer.sv#L259:
rtl/redmule_streamer.sv#L259
Remove trailing spaces. [Style: trailing-spaces] [no-trailing-spaces]
|
|
[verible-verilog-lint] rtl/redmule_fma.sv#L51:
rtl/redmule_fma.sv#L51
Non-type localparam names must be styled with CamelCase [Style: constants] [parameter-name-style]
|
|
[verible-verilog-lint] rtl/redmule_fma.sv#L52:
rtl/redmule_fma.sv#L52
Non-type localparam names must be styled with CamelCase [Style: constants] [parameter-name-style]
|
|
[verible-verilog-lint] rtl/redmule_fma.sv#L55:
rtl/redmule_fma.sv#L55
Non-type localparam names must be styled with CamelCase [Style: constants] [parameter-name-style]
|
|
[verible-verilog-lint] rtl/redmule_fma.sv#L57:
rtl/redmule_fma.sv#L57
Non-type localparam names must be styled with CamelCase [Style: constants] [parameter-name-style]
|
|
[verible-verilog-lint] rtl/redmule_fma.sv#L58:
rtl/redmule_fma.sv#L58
Non-type localparam names must be styled with CamelCase [Style: constants] [parameter-name-style]
|
|
[verible-verilog-lint] rtl/redmule_fma.sv#L62:
rtl/redmule_fma.sv#L62
Non-type localparam names must be styled with CamelCase [Style: constants] [parameter-name-style]
|
|
[verible-verilog-lint] rtl/redmule_fma.sv#L64:
rtl/redmule_fma.sv#L64
Non-type localparam names must be styled with CamelCase [Style: constants] [parameter-name-style]
|
|
[verible-verilog-lint] rtl/redmule_fma.sv#L66:
rtl/redmule_fma.sv#L66
Explicitly define a storage type for every parameter and localparam, (NUM_INP_REGS). [Style: constants] [explicit-parameter-storage-type]
|
|
[verible-verilog-lint] rtl/redmule_fma.sv#L71:
rtl/redmule_fma.sv#L71
Explicitly define a storage type for every parameter and localparam, (NUM_MID_REGS). [Style: constants] [explicit-parameter-storage-type]
|
|
[verible-verilog-lint] rtl/redmule_fma.sv#L76:
rtl/redmule_fma.sv#L76
Explicitly define a storage type for every parameter and localparam, (NUM_OUT_REGS). [Style: constants] [explicit-parameter-storage-type]
|
|
[verible-verilog-lint] rtl/redmule_fma.sv#L95:
rtl/redmule_fma.sv#L95
Declare packed dimension range in little-endian (decreasing) order, e.g. [N-1:0]. [Style: packed-ordering] [packed-dimensions-range-ordering]
|
|
[verible-verilog-lint] rtl/redmule_fma.sv#L96:
rtl/redmule_fma.sv#L96
Declare packed dimension range in little-endian (decreasing) order, e.g. [N-1:0]. [Style: packed-ordering] [packed-dimensions-range-ordering]
|
|
[verible-verilog-lint] rtl/redmule_fma.sv#L97:
rtl/redmule_fma.sv#L97
Declare packed dimension range in little-endian (decreasing) order, e.g. [N-1:0]. [Style: packed-ordering] [packed-dimensions-range-ordering]
|
|
[verible-verilog-lint] rtl/redmule_fma.sv#L98:
rtl/redmule_fma.sv#L98
Declare packed dimension range in little-endian (decreasing) order, e.g. [N-1:0]. [Style: packed-ordering] [packed-dimensions-range-ordering]
|
|
[verible-verilog-lint] rtl/redmule_fma.sv#L99:
rtl/redmule_fma.sv#L99
Declare packed dimension range in little-endian (decreasing) order, e.g. [N-1:0]. [Style: packed-ordering] [packed-dimensions-range-ordering]
|
|
[verible-verilog-lint] rtl/redmule_fma.sv#L100:
rtl/redmule_fma.sv#L100
Declare packed dimension range in little-endian (decreasing) order, e.g. [N-1:0]. [Style: packed-ordering] [packed-dimensions-range-ordering]
|
|
[verible-verilog-lint] rtl/redmule_fma.sv#L101:
rtl/redmule_fma.sv#L101
Declare packed dimension range in little-endian (decreasing) order, e.g. [N-1:0]. [Style: packed-ordering] [packed-dimensions-range-ordering]
|
|
[verible-verilog-lint] rtl/redmule_fma.sv#L102:
rtl/redmule_fma.sv#L102
Declare packed dimension range in little-endian (decreasing) order, e.g. [N-1:0]. [Style: packed-ordering] [packed-dimensions-range-ordering]
|
|
[verible-verilog-lint] rtl/redmule_fma.sv#L104:
rtl/redmule_fma.sv#L104
Declare packed dimension range in little-endian (decreasing) order, e.g. [N-1:0]. [Style: packed-ordering] [packed-dimensions-range-ordering]
|
|
[verible-verilog-lint] rtl/redmule_fma.sv#L126:
rtl/redmule_fma.sv#L126
Line length exceeds max: 100; is: 105 [Style: line-length] [line-length]
|
|
[verible-verilog-lint] rtl/redmule_fma.sv#L393:
rtl/redmule_fma.sv#L393
Declare packed dimension range in little-endian (decreasing) order, e.g. [N-1:0]. [Style: packed-ordering] [packed-dimensions-range-ordering]
|
|
[verible-verilog-lint] rtl/redmule_fma.sv#L394:
rtl/redmule_fma.sv#L394
Declare packed dimension range in little-endian (decreasing) order, e.g. [N-1:0]. [Style: packed-ordering] [packed-dimensions-range-ordering]
|
|
[verible-verilog-lint] rtl/redmule_fma.sv#L395:
rtl/redmule_fma.sv#L395
Declare packed dimension range in little-endian (decreasing) order, e.g. [N-1:0]. [Style: packed-ordering] [packed-dimensions-range-ordering]
|
|
[verible-verilog-lint] rtl/redmule_fma.sv#L396:
rtl/redmule_fma.sv#L396
Declare packed dimension range in little-endian (decreasing) order, e.g. [N-1:0]. [Style: packed-ordering] [packed-dimensions-range-ordering]
|
|
[verible-verilog-lint] rtl/redmule_fma.sv#L397:
rtl/redmule_fma.sv#L397
Declare packed dimension range in little-endian (decreasing) order, e.g. [N-1:0]. [Style: packed-ordering] [packed-dimensions-range-ordering]
|
|
[verible-verilog-lint] rtl/redmule_fma.sv#L398:
rtl/redmule_fma.sv#L398
Declare packed dimension range in little-endian (decreasing) order, e.g. [N-1:0]. [Style: packed-ordering] [packed-dimensions-range-ordering]
|
|
[verible-verilog-lint] rtl/redmule_fma.sv#L399:
rtl/redmule_fma.sv#L399
Declare packed dimension range in little-endian (decreasing) order, e.g. [N-1:0]. [Style: packed-ordering] [packed-dimensions-range-ordering]
|
|
[verible-verilog-lint] rtl/redmule_fma.sv#L400:
rtl/redmule_fma.sv#L400
Declare packed dimension range in little-endian (decreasing) order, e.g. [N-1:0]. [Style: packed-ordering] [packed-dimensions-range-ordering]
|
|
[verible-verilog-lint] rtl/redmule_fma.sv#L401:
rtl/redmule_fma.sv#L401
Declare packed dimension range in little-endian (decreasing) order, e.g. [N-1:0]. [Style: packed-ordering] [packed-dimensions-range-ordering]
|
|
[verible-verilog-lint] rtl/redmule_fma.sv#L402:
rtl/redmule_fma.sv#L402
Declare packed dimension range in little-endian (decreasing) order, e.g. [N-1:0]. [Style: packed-ordering] [packed-dimensions-range-ordering]
|
|
[verible-verilog-lint] rtl/redmule_fma.sv#L403:
rtl/redmule_fma.sv#L403
Declare packed dimension range in little-endian (decreasing) order, e.g. [N-1:0]. [Style: packed-ordering] [packed-dimensions-range-ordering]
|
|
[verible-verilog-lint] rtl/redmule_fma.sv#L404:
rtl/redmule_fma.sv#L404
Declare packed dimension range in little-endian (decreasing) order, e.g. [N-1:0]. [Style: packed-ordering] [packed-dimensions-range-ordering]
|
|
[verible-verilog-lint] rtl/redmule_fma.sv#L405:
rtl/redmule_fma.sv#L405
Declare packed dimension range in little-endian (decreasing) order, e.g. [N-1:0]. [Style: packed-ordering] [packed-dimensions-range-ordering]
|
|
[verible-verilog-lint] rtl/redmule_fma.sv#L406:
rtl/redmule_fma.sv#L406
Declare packed dimension range in little-endian (decreasing) order, e.g. [N-1:0]. [Style: packed-ordering] [packed-dimensions-range-ordering]
|
|
[verible-verilog-lint] rtl/redmule_fma.sv#L407:
rtl/redmule_fma.sv#L407
Declare packed dimension range in little-endian (decreasing) order, e.g. [N-1:0]. [Style: packed-ordering] [packed-dimensions-range-ordering]
|
|
[verible-verilog-lint] rtl/redmule_fma.sv#L409:
rtl/redmule_fma.sv#L409
Declare packed dimension range in little-endian (decreasing) order, e.g. [N-1:0]. [Style: packed-ordering] [packed-dimensions-range-ordering]
|
|
[verible-verilog-lint] rtl/redmule_fma.sv#L439:
rtl/redmule_fma.sv#L439
Line length exceeds max: 100; is: 105 [Style: line-length] [line-length]
|
|
[verible-verilog-lint] rtl/redmule_fma.sv#L511:
rtl/redmule_fma.sv#L511
Line length exceeds max: 100; is: 104 [Style: line-length] [line-length]
|
|
[verible-verilog-lint] rtl/redmule_fma.sv#L582:
rtl/redmule_fma.sv#L582
Line length exceeds max: 100; is: 106 [Style: line-length] [line-length]
|
|
[verible-verilog-lint] rtl/redmule_fma.sv#L638:
rtl/redmule_fma.sv#L638
Declare packed dimension range in little-endian (decreasing) order, e.g. [N-1:0]. [Style: packed-ordering] [packed-dimensions-range-ordering]
|
|
[verible-verilog-lint] rtl/redmule_fma.sv#L639:
rtl/redmule_fma.sv#L639
Declare packed dimension range in little-endian (decreasing) order, e.g. [N-1:0]. [Style: packed-ordering] [packed-dimensions-range-ordering]
|
|
[verible-verilog-lint] rtl/redmule_fma.sv#L640:
rtl/redmule_fma.sv#L640
Declare packed dimension range in little-endian (decreasing) order, e.g. [N-1:0]. [Style: packed-ordering] [packed-dimensions-range-ordering]
|
|
[verible-verilog-lint] rtl/redmule_fma.sv#L641:
rtl/redmule_fma.sv#L641
Declare packed dimension range in little-endian (decreasing) order, e.g. [N-1:0]. [Style: packed-ordering] [packed-dimensions-range-ordering]
|
|
[verible-verilog-lint] rtl/redmule_fma.sv#L642:
rtl/redmule_fma.sv#L642
Declare packed dimension range in little-endian (decreasing) order, e.g. [N-1:0]. [Style: packed-ordering] [packed-dimensions-range-ordering]
|
|
[verible-verilog-lint] rtl/redmule_fma.sv#L644:
rtl/redmule_fma.sv#L644
Declare packed dimension range in little-endian (decreasing) order, e.g. [N-1:0]. [Style: packed-ordering] [packed-dimensions-range-ordering]
|
|
[verible-verilog-lint] rtl/redmule_fma.sv#L663:
rtl/redmule_fma.sv#L663
Line length exceeds max: 100; is: 105 [Style: line-length] [line-length]
|
|
[verible-verilog-lint] rtl/redmule_inst_decoder.sv#L8:
rtl/redmule_inst_decoder.sv#L8
Remove trailing spaces. [Style: trailing-spaces] [no-trailing-spaces]
|
|
[verible-verilog-lint] rtl/redmule_inst_decoder.sv#L49:
rtl/redmule_inst_decoder.sv#L49
Enum names must use lower_snake_case naming convention and end with _t or _e. [Style: enumerations] [enum-name-style]
|
|
[verible-verilog-lint] rtl/redmule_inst_decoder.sv#L84:
rtl/redmule_inst_decoder.sv#L84
Explicitly define a default case for every case statement. [Style: case-statements] [case-missing-default]
|
|
[verible-verilog-lint] rtl/redmule_inst_decoder.sv#L92:
rtl/redmule_inst_decoder.sv#L92
Line length exceeds max: 100; is: 108 [Style: line-length] [line-length]
|
|
[verible-verilog-lint] rtl/redmule_inst_decoder.sv#L173:
rtl/redmule_inst_decoder.sv#L173
Explicitly define a default case for every case statement. [Style: case-statements] [case-missing-default]
|
|
[verible-verilog-lint] rtl/redmule_inst_decoder.sv#L177:
rtl/redmule_inst_decoder.sv#L177
Remove trailing spaces. [Style: trailing-spaces] [no-trailing-spaces]
|
|
[verible-verilog-lint] rtl/redmule_engine.sv#L13:
rtl/redmule_engine.sv#L13
Line length exceeds max: 100; is: 123 [Style: line-length] [line-length]
|
|
[verible-verilog-lint] rtl/redmule_engine.sv#L14:
rtl/redmule_engine.sv#L14
Line length exceeds max: 100; is: 126 [Style: line-length] [line-length]
|
|
[verible-verilog-lint] rtl/redmule_engine.sv#L19:
rtl/redmule_engine.sv#L19
Line length exceeds max: 100; is: 135 [Style: line-length] [line-length]
|
|
[verible-verilog-lint] rtl/redmule_engine.sv#L19:
rtl/redmule_engine.sv#L19
Remove trailing spaces. [Style: trailing-spaces] [no-trailing-spaces]
|
|
[verible-verilog-lint] rtl/redmule_engine.sv#L26:
rtl/redmule_engine.sv#L26
Remove trailing spaces. [Style: trailing-spaces] [no-trailing-spaces]
|
|
[verible-verilog-lint] rtl/redmule_engine.sv#L27:
rtl/redmule_engine.sv#L27
Line length exceeds max: 100; is: 120 [Style: line-length] [line-length]
|
|
[verible-verilog-lint] rtl/redmule_engine.sv#L28:
rtl/redmule_engine.sv#L28
Line length exceeds max: 100; is: 124 [Style: line-length] [line-length]
|
|
[verible-verilog-lint] rtl/redmule_engine.sv#L30:
rtl/redmule_engine.sv#L30
Remove trailing spaces. [Style: trailing-spaces] [no-trailing-spaces]
|
|
[verible-verilog-lint] rtl/redmule_engine.sv#L31:
rtl/redmule_engine.sv#L31
Line length exceeds max: 100; is: 103 [Style: line-length] [line-length]
|
|
[verible-verilog-lint] rtl/redmule_engine.sv#L46:
rtl/redmule_engine.sv#L46
Remove trailing spaces. [Style: trailing-spaces] [no-trailing-spaces]
|
|
[verible-verilog-lint] rtl/redmule_engine.sv#L51:
rtl/redmule_engine.sv#L51
Remove trailing spaces. [Style: trailing-spaces] [no-trailing-spaces]
|
|
[verible-verilog-lint] rtl/redmule_engine.sv#L58:
rtl/redmule_engine.sv#L58
Remove trailing spaces. [Style: trailing-spaces] [no-trailing-spaces]
|
|
[verible-verilog-lint] rtl/redmule_engine.sv#L76:
rtl/redmule_engine.sv#L76
All generate block statements must have a label [Style: generate-statements] [generate-label]
|
|
[verible-verilog-lint] rtl/redmule_engine.sv#L120:
rtl/redmule_engine.sv#L120
Remove trailing spaces. [Style: trailing-spaces] [no-trailing-spaces]
|
|
[verible-verilog-lint] rtl/redmule_engine.sv#L129:
rtl/redmule_engine.sv#L129
Use spaces, not tabs. [Style: tabs] [no-tabs]
|
|
[verible-verilog-lint] rtl/redmule_x_buffer.sv#L16:
rtl/redmule_x_buffer.sv#L16
Line length exceeds max: 100; is: 140 [Style: line-length] [line-length]
|
|
[verible-verilog-lint] rtl/redmule_x_buffer.sv#L16:
rtl/redmule_x_buffer.sv#L16
Remove trailing spaces. [Style: trailing-spaces] [no-trailing-spaces]
|
|
[verible-verilog-lint] rtl/redmule_x_buffer.sv#L20:
rtl/redmule_x_buffer.sv#L20
Non-type localparam names must be styled with CamelCase [Style: constants] [parameter-name-style]
|
|
[verible-verilog-lint] rtl/redmule_x_buffer.sv#L21:
rtl/redmule_x_buffer.sv#L21
Non-type localparam names must be styled with CamelCase [Style: constants] [parameter-name-style]
|
|
[verible-verilog-lint] rtl/redmule_x_buffer.sv#L25:
rtl/redmule_x_buffer.sv#L25
Remove trailing spaces. [Style: trailing-spaces] [no-trailing-spaces]
|
|
[verible-verilog-lint] rtl/redmule_x_buffer.sv#L46:
rtl/redmule_x_buffer.sv#L46
Use spaces, not tabs. [Style: tabs] [no-tabs]
|
|
[verible-verilog-lint] rtl/redmule_x_buffer.sv#L47:
rtl/redmule_x_buffer.sv#L47
Use spaces, not tabs. [Style: tabs] [no-tabs]
|
|
[verible-verilog-lint] rtl/redmule_x_buffer.sv#L65:
rtl/redmule_x_buffer.sv#L65
Remove trailing spaces. [Style: trailing-spaces] [no-trailing-spaces]
|
|
[verible-verilog-lint] rtl/redmule_x_buffer.sv#L70:
rtl/redmule_x_buffer.sv#L70
Use spaces, not tabs. [Style: tabs] [no-tabs]
|
|
[verible-verilog-lint] rtl/redmule_x_buffer.sv#L72:
rtl/redmule_x_buffer.sv#L72
Use spaces, not tabs. [Style: tabs] [no-tabs]
|
|
[verible-verilog-lint] rtl/redmule_x_buffer.sv#L97:
rtl/redmule_x_buffer.sv#L97
Remove trailing spaces. [Style: trailing-spaces] [no-trailing-spaces]
|
|
[verible-verilog-lint] rtl/redmule_x_buffer.sv#L176:
rtl/redmule_x_buffer.sv#L176
Remove trailing spaces. [Style: trailing-spaces] [no-trailing-spaces]
|
|
[verible-verilog-lint] rtl/redmule_x_buffer.sv#L187:
rtl/redmule_x_buffer.sv#L187
All generate block statements must have a label [Style: generate-statements] [generate-label]
|
|
[verible-verilog-lint] rtl/redmule_x_buffer.sv#L188:
rtl/redmule_x_buffer.sv#L188
All generate block statements must have a label [Style: generate-statements] [generate-label]
|
|
[verible-verilog-lint] rtl/redmule_tiler.sv#L72:
rtl/redmule_tiler.sv#L72
Line length exceeds max: 100; is: 104 [Style: line-length] [line-length]
|
|
[verible-verilog-lint] rtl/redmule_tiler.sv#L76:
rtl/redmule_tiler.sv#L76
Line length exceeds max: 100; is: 104 [Style: line-length] [line-length]
|
|
[verible-verilog-lint] rtl/redmule_tiler.sv#L79:
rtl/redmule_tiler.sv#L79
Line length exceeds max: 100; is: 109 [Style: line-length] [line-length]
|
|
[verible-verilog-lint] rtl/redmule_tiler.sv#L80:
rtl/redmule_tiler.sv#L80
Line length exceeds max: 100; is: 109 [Style: line-length] [line-length]
|
|
[verible-verilog-lint] rtl/redmule_tiler.sv#L81:
rtl/redmule_tiler.sv#L81
Line length exceeds max: 100; is: 109 [Style: line-length] [line-length]
|
|
[verible-verilog-lint] rtl/redmule_tiler.sv#L82:
rtl/redmule_tiler.sv#L82
Line length exceeds max: 100; is: 109 [Style: line-length] [line-length]
|
|
[verible-verilog-lint] rtl/redmule_tiler.sv#L86:
rtl/redmule_tiler.sv#L86
Line length exceeds max: 100; is: 103 [Style: line-length] [line-length]
|
|
[verible-verilog-lint] rtl/redmule_tiler.sv#L156:
rtl/redmule_tiler.sv#L156
Line length exceeds max: 100; is: 114 [Style: line-length] [line-length]
|
|
[verible-verilog-lint] rtl/redmule_tiler.sv#L157:
rtl/redmule_tiler.sv#L157
Line length exceeds max: 100; is: 109 [Style: line-length] [line-length]
|
|
[verible-verilog-lint] rtl/redmule_tiler.sv#L197:
rtl/redmule_tiler.sv#L197
Line length exceeds max: 100; is: 117 [Style: line-length] [line-length]
|
|
[verible-verilog-lint] rtl/redmule_tiler.sv#L200:
rtl/redmule_tiler.sv#L200
Line length exceeds max: 100; is: 117 [Style: line-length] [line-length]
|
|
[verible-verilog-lint] rtl/redmule_tiler.sv#L231:
rtl/redmule_tiler.sv#L231
Line length exceeds max: 100; is: 122 [Style: line-length] [line-length]
|
|
[verible-verilog-lint] rtl/redmule_tiler.sv#L232:
rtl/redmule_tiler.sv#L232
Line length exceeds max: 100; is: 122 [Style: line-length] [line-length]
|
|
[verible-verilog-lint] rtl/redmule_tiler.sv#L233:
rtl/redmule_tiler.sv#L233
Line length exceeds max: 100; is: 122 [Style: line-length] [line-length]
|
|
[verible-verilog-lint] rtl/redmule_ce.sv#L76:
rtl/redmule_ce.sv#L76
All generate block labels must start with g_ or gen_ [Style: generate-constructs] [generate-label-prefix]
|
|
[verible-verilog-lint] rtl/redmule_scheduler.sv#L180:
rtl/redmule_scheduler.sv#L180
Line length exceeds max: 100; is: 102 [Style: line-length] [line-length]
|
|
[verible-verilog-lint] rtl/redmule_scheduler.sv#L186:
rtl/redmule_scheduler.sv#L186
Line length exceeds max: 100; is: 106 [Style: line-length] [line-length]
|
|
[verible-verilog-lint] rtl/redmule_scheduler.sv#L191:
rtl/redmule_scheduler.sv#L191
Line length exceeds max: 100; is: 101 [Style: line-length] [line-length]
|
|
[verible-verilog-lint] rtl/redmule_scheduler.sv#L192:
rtl/redmule_scheduler.sv#L192
Line length exceeds max: 100; is: 102 [Style: line-length] [line-length]
|
|
[verible-verilog-lint] rtl/redmule_scheduler.sv#L193:
rtl/redmule_scheduler.sv#L193
Line length exceeds max: 100; is: 106 [Style: line-length] [line-length]
|
|
[verible-verilog-lint] rtl/redmule_scheduler.sv#L194:
rtl/redmule_scheduler.sv#L194
Line length exceeds max: 100; is: 106 [Style: line-length] [line-length]
|
|
[verible-verilog-lint] rtl/redmule_scheduler.sv#L195:
rtl/redmule_scheduler.sv#L195
Line length exceeds max: 100; is: 105 [Style: line-length] [line-length]
|
|
[verible-verilog-lint] rtl/redmule_scheduler.sv#L201:
rtl/redmule_scheduler.sv#L201
Line length exceeds max: 100; is: 101 [Style: line-length] [line-length]
|
|
[verible-verilog-lint] rtl/redmule_scheduler.sv#L202:
rtl/redmule_scheduler.sv#L202
Line length exceeds max: 100; is: 102 [Style: line-length] [line-length]
|
|
[verible-verilog-lint] rtl/redmule_scheduler.sv#L204:
rtl/redmule_scheduler.sv#L204
Line length exceeds max: 100; is: 106 [Style: line-length] [line-length]
|
|
[verible-verilog-lint] rtl/redmule_scheduler.sv#L205:
rtl/redmule_scheduler.sv#L205
Line length exceeds max: 100; is: 105 [Style: line-length] [line-length]
|
|
[verible-verilog-lint] rtl/redmule_scheduler.sv#L206:
rtl/redmule_scheduler.sv#L206
Remove trailing spaces. [Style: trailing-spaces] [no-trailing-spaces]
|
|
[verible-verilog-lint] rtl/redmule_scheduler.sv#L207:
rtl/redmule_scheduler.sv#L207
Line length exceeds max: 100; is: 106 [Style: line-length] [line-length]
|
|
[verible-verilog-lint] rtl/redmule_scheduler.sv#L214:
rtl/redmule_scheduler.sv#L214
Line length exceeds max: 100; is: 104 [Style: line-length] [line-length]
|
|
[verible-verilog-lint] rtl/redmule_scheduler.sv#L215:
rtl/redmule_scheduler.sv#L215
Line length exceeds max: 100; is: 103 [Style: line-length] [line-length]
|
|
[verible-verilog-lint] rtl/redmule_scheduler.sv#L217:
rtl/redmule_scheduler.sv#L217
Line length exceeds max: 100; is: 104 [Style: line-length] [line-length]
|
|
[verible-verilog-lint] rtl/redmule_scheduler.sv#L229:
rtl/redmule_scheduler.sv#L229
Remove trailing spaces. [Style: trailing-spaces] [no-trailing-spaces]
|
|
[verible-verilog-lint] rtl/redmule_scheduler.sv#L240:
rtl/redmule_scheduler.sv#L240
Remove trailing spaces. [Style: trailing-spaces] [no-trailing-spaces]
|
|
[verible-verilog-lint] rtl/redmule_scheduler.sv#L251:
rtl/redmule_scheduler.sv#L251
Remove trailing spaces. [Style: trailing-spaces] [no-trailing-spaces]
|
|
[verible-verilog-lint] rtl/redmule_scheduler.sv#L262:
rtl/redmule_scheduler.sv#L262
Remove trailing spaces. [Style: trailing-spaces] [no-trailing-spaces]
|
|
[verible-verilog-lint] rtl/redmule_scheduler.sv#L273:
rtl/redmule_scheduler.sv#L273
Remove trailing spaces. [Style: trailing-spaces] [no-trailing-spaces]
|
|
[verible-verilog-lint] rtl/redmule_scheduler.sv#L284:
rtl/redmule_scheduler.sv#L284
Remove trailing spaces. [Style: trailing-spaces] [no-trailing-spaces]
|
|
[verible-verilog-lint] rtl/redmule_scheduler.sv#L308:
rtl/redmule_scheduler.sv#L308
Remove trailing spaces. [Style: trailing-spaces] [no-trailing-spaces]
|
|
[verible-verilog-lint] rtl/redmule_scheduler.sv#L456:
rtl/redmule_scheduler.sv#L456
Remove trailing spaces. [Style: trailing-spaces] [no-trailing-spaces]
|
|
[verible-verilog-lint] rtl/redmule_scheduler.sv#L462:
rtl/redmule_scheduler.sv#L462
Remove trailing spaces. [Style: trailing-spaces] [no-trailing-spaces]
|
|
[verible-verilog-lint] rtl/redmule_scheduler.sv#L471:
rtl/redmule_scheduler.sv#L471
Remove trailing spaces. [Style: trailing-spaces] [no-trailing-spaces]
|
|
[verible-verilog-lint] rtl/redmule_scheduler.sv#L497:
rtl/redmule_scheduler.sv#L497
Remove trailing spaces. [Style: trailing-spaces] [no-trailing-spaces]
|
|
[verible-verilog-lint] rtl/redmule_scheduler.sv#L605:
rtl/redmule_scheduler.sv#L605
Line length exceeds max: 100; is: 170 [Style: line-length] [line-length]
|
|
[verible-verilog-lint] rtl/redmule_scheduler.sv#L742:
rtl/redmule_scheduler.sv#L742
Remove trailing spaces. [Style: trailing-spaces] [no-trailing-spaces]
|
|
[verible-verilog-lint] rtl/redmule_scheduler.sv#L793:
rtl/redmule_scheduler.sv#L793
Line length exceeds max: 100; is: 107 [Style: line-length] [line-length]
|
|
[verible-verilog-lint] rtl/redmule_scheduler.sv#L795:
rtl/redmule_scheduler.sv#L795
Line length exceeds max: 100; is: 128 [Style: line-length] [line-length]
|
|
[verible-verilog-lint] rtl/redmule_scheduler.sv#L837:
rtl/redmule_scheduler.sv#L837
Line length exceeds max: 100; is: 110 [Style: line-length] [line-length]
|
|
[verible-verilog-lint] rtl/redmule_scheduler.sv#L838:
rtl/redmule_scheduler.sv#L838
Line length exceeds max: 100; is: 110 [Style: line-length] [line-length]
|
|
[verible-verilog-lint] rtl/redmule_scheduler.sv#L839:
rtl/redmule_scheduler.sv#L839
Line length exceeds max: 100; is: 110 [Style: line-length] [line-length]
|
|
[verible-verilog-lint] rtl/redmule_scheduler.sv#L840:
rtl/redmule_scheduler.sv#L840
Line length exceeds max: 100; is: 110 [Style: line-length] [line-length]
|
|
[verible-verilog-lint] rtl/redmule_scheduler.sv#L845:
rtl/redmule_scheduler.sv#L845
Line length exceeds max: 100; is: 110 [Style: line-length] [line-length]
|
|
[verible-verilog-lint] rtl/redmule_scheduler.sv#L846:
rtl/redmule_scheduler.sv#L846
Line length exceeds max: 100; is: 110 [Style: line-length] [line-length]
|
|
[verible-verilog-lint] rtl/redmule_scheduler.sv#L847:
rtl/redmule_scheduler.sv#L847
Line length exceeds max: 100; is: 110 [Style: line-length] [line-length]
|
|
[verible-verilog-lint] rtl/redmule_scheduler.sv#L848:
rtl/redmule_scheduler.sv#L848
Line length exceeds max: 100; is: 110 [Style: line-length] [line-length]
|
|
[verible-verilog-lint] rtl/redmule_scheduler.sv#L856:
rtl/redmule_scheduler.sv#L856
Line length exceeds max: 100; is: 155 [Style: line-length] [line-length]
|
|
[verible-verilog-lint] rtl/redmule_scheduler.sv#L857:
rtl/redmule_scheduler.sv#L857
Line length exceeds max: 100; is: 168 [Style: line-length] [line-length]
|
|
[verible-verilog-lint] rtl/redmule_scheduler.sv#L858:
rtl/redmule_scheduler.sv#L858
Line length exceeds max: 100; is: 187 [Style: line-length] [line-length]
|
|
[verible-verilog-lint] rtl/redmule_scheduler.sv#L859:
rtl/redmule_scheduler.sv#L859
Line length exceeds max: 100; is: 191 [Style: line-length] [line-length]
|
|
[verible-verilog-lint] rtl/redmule_scheduler.sv#L860:
rtl/redmule_scheduler.sv#L860
Line length exceeds max: 100; is: 179 [Style: line-length] [line-length]
|
|
[verible-verilog-lint] rtl/redmule_scheduler.sv#L861:
rtl/redmule_scheduler.sv#L861
Line length exceeds max: 100; is: 192 [Style: line-length] [line-length]
|
|
[verible-verilog-lint] rtl/redmule_scheduler.sv#L862:
rtl/redmule_scheduler.sv#L862
Line length exceeds max: 100; is: 138 [Style: line-length] [line-length]
|
|
[verible-verilog-lint] rtl/redmule_scheduler.sv#L864:
rtl/redmule_scheduler.sv#L864
Line length exceeds max: 100; is: 106 [Style: line-length] [line-length]
|
|
[verible-verilog-lint] rtl/redmule_scheduler.sv#L865:
rtl/redmule_scheduler.sv#L865
Binary literal 16'b1 has less digits than expected for 16 bits. [Style: number-literals] [undersized-binary-literal]
|
|
[verible-verilog-lint] rtl/redmule_scheduler.sv#L919:
rtl/redmule_scheduler.sv#L919
Remove trailing spaces. [Style: trailing-spaces] [no-trailing-spaces]
|
|
[verible-verilog-lint] rtl/redmule_scheduler.sv#L1000:
rtl/redmule_scheduler.sv#L1000
Explicitly define a default case for every case statement. [Style: case-statements] [case-missing-default]
|
|
[verible-verilog-lint] rtl/redmule_scheduler.sv#L1010:
rtl/redmule_scheduler.sv#L1010
Binary literal 16'b1 has less digits than expected for 16 bits. [Style: number-literals] [undersized-binary-literal]
|
|
[verible-verilog-lint] rtl/redmule_scheduler.sv#L1010:
rtl/redmule_scheduler.sv#L1010
Line length exceeds max: 100; is: 112 [Style: line-length] [line-length]
|
|
[verible-verilog-lint] rtl/redmule_scheduler.sv#L1025:
rtl/redmule_scheduler.sv#L1025
Remove trailing spaces. [Style: trailing-spaces] [no-trailing-spaces]
|
|
[verible-verilog-lint] rtl/redmule_scheduler.sv#L1060:
rtl/redmule_scheduler.sv#L1060
Remove trailing spaces. [Style: trailing-spaces] [no-trailing-spaces]
|
|
[verible-verilog-lint] rtl/redmule_scheduler.sv#L1078:
rtl/redmule_scheduler.sv#L1078
Explicitly define a default case for every case statement. [Style: case-statements] [case-missing-default]
|
|
[verible-verilog-lint] rtl/redmule_scheduler.sv#L1079:
rtl/redmule_scheduler.sv#L1079
Line length exceeds max: 100; is: 111 [Style: line-length] [line-length]
|
|
[verible-verilog-lint] rtl/redmule_scheduler.sv#L1085:
rtl/redmule_scheduler.sv#L1085
Remove trailing spaces. [Style: trailing-spaces] [no-trailing-spaces]
|
|
[verible-verilog-lint] rtl/redmule_scheduler.sv#L1092:
rtl/redmule_scheduler.sv#L1092
Remove trailing spaces. [Style: trailing-spaces] [no-trailing-spaces]
|
|
[verible-verilog-lint] rtl/redmule_scheduler.sv#L1137:
rtl/redmule_scheduler.sv#L1137
Line length exceeds max: 100; is: 144 [Style: line-length] [line-length]
|
|
[verible-verilog-lint] rtl/redmule_scheduler.sv#L1185:
rtl/redmule_scheduler.sv#L1185
Remove trailing spaces. [Style: trailing-spaces] [no-trailing-spaces]
|
|
[verible-verilog-lint] rtl/redmule_scheduler.sv#L1207:
rtl/redmule_scheduler.sv#L1207
Line length exceeds max: 100; is: 168 [Style: line-length] [line-length]
|
|
[verible-verilog-lint] rtl/redmule_scheduler.sv#L1208:
rtl/redmule_scheduler.sv#L1208
Line length exceeds max: 100; is: 250 [Style: line-length] [line-length]
|
|
[verible-verilog-lint] rtl/redmule_scheduler.sv#L1208:
rtl/redmule_scheduler.sv#L1208
Binary literal 16'b1 has less digits than expected for 16 bits. [Style: number-literals] [undersized-binary-literal]
|
|
[verible-verilog-lint] rtl/redmule_scheduler.sv#L1208:
rtl/redmule_scheduler.sv#L1208
Binary literal 16'b1 has less digits than expected for 16 bits. [Style: number-literals] [undersized-binary-literal]
|
|
[verible-verilog-lint] rtl/redmule_scheduler.sv#L1209:
rtl/redmule_scheduler.sv#L1209
Line length exceeds max: 100; is: 168 [Style: line-length] [line-length]
|
|
[verible-verilog-lint] rtl/redmule_scheduler.sv#L1217:
rtl/redmule_scheduler.sv#L1217
Line length exceeds max: 100; is: 114 [Style: line-length] [line-length]
|
|
[verible-verilog-lint] rtl/redmule_scheduler.sv#L1230:
rtl/redmule_scheduler.sv#L1230
Binary literal 16'b1 has less digits than expected for 16 bits. [Style: number-literals] [undersized-binary-literal]
|
|
[verible-verilog-lint] rtl/redmule_scheduler.sv#L1230:
rtl/redmule_scheduler.sv#L1230
Line length exceeds max: 100; is: 141 [Style: line-length] [line-length]
|
|
[verible-verilog-lint] rtl/redmule_scheduler.sv#L1234:
rtl/redmule_scheduler.sv#L1234
Remove trailing spaces. [Style: trailing-spaces] [no-trailing-spaces]
|
|
[verible-verilog-lint] rtl/redmule_scheduler.sv#L1260:
rtl/redmule_scheduler.sv#L1260
Remove trailing spaces. [Style: trailing-spaces] [no-trailing-spaces]
|
|
[verible-verilog-lint] rtl/redmule_scheduler.sv#L1270:
rtl/redmule_scheduler.sv#L1270
Remove trailing spaces. [Style: trailing-spaces] [no-trailing-spaces]
|
|
[verible-verilog-lint] rtl/redmule_scheduler.sv#L1289:
rtl/redmule_scheduler.sv#L1289
Remove trailing spaces. [Style: trailing-spaces] [no-trailing-spaces]
|
|
[verible-verilog-lint] rtl/redmule_scheduler.sv#L1302:
rtl/redmule_scheduler.sv#L1302
Remove trailing spaces. [Style: trailing-spaces] [no-trailing-spaces]
|
|
[verible-verilog-lint] rtl/redmule_scheduler.sv#L1305:
rtl/redmule_scheduler.sv#L1305
Remove trailing spaces. [Style: trailing-spaces] [no-trailing-spaces]
|
|
[verible-verilog-lint] rtl/redmule_scheduler.sv#L1338:
rtl/redmule_scheduler.sv#L1338
Remove trailing spaces. [Style: trailing-spaces] [no-trailing-spaces]
|
|
[verible-verilog-lint] rtl/redmule_scheduler.sv#L1339:
rtl/redmule_scheduler.sv#L1339
Remove trailing spaces. [Style: trailing-spaces] [no-trailing-spaces]
|
|
[verible-verilog-lint] rtl/redmule_scheduler.sv#L1364:
rtl/redmule_scheduler.sv#L1364
Remove trailing spaces. [Style: trailing-spaces] [no-trailing-spaces]
|
|
[verible-verilog-lint] rtl/redmule_scheduler.sv#L1387:
rtl/redmule_scheduler.sv#L1387
Line length exceeds max: 100; is: 158 [Style: line-length] [line-length]
|
|
[verible-verilog-lint] rtl/redmule_scheduler.sv#L1391:
rtl/redmule_scheduler.sv#L1391
Remove trailing spaces. [Style: trailing-spaces] [no-trailing-spaces]
|
|
[verible-verilog-lint] rtl/redmule_scheduler.sv#L1406:
rtl/redmule_scheduler.sv#L1406
Line length exceeds max: 100; is: 186 [Style: line-length] [line-length]
|
|
[verible-verilog-lint] rtl/redmule_scheduler.sv#L1406:
rtl/redmule_scheduler.sv#L1406
Binary literal 16'b1 has less digits than expected for 16 bits. [Style: number-literals] [undersized-binary-literal]
|
|
[verible-verilog-lint] rtl/redmule_scheduler.sv#L1410:
rtl/redmule_scheduler.sv#L1410
Binary literal 16'b1 has less digits than expected for 16 bits. [Style: number-literals] [undersized-binary-literal]
|
|
[verible-verilog-lint] rtl/redmule_scheduler.sv#L1444:
rtl/redmule_scheduler.sv#L1444
Line length exceeds max: 100; is: 121 [Style: line-length] [line-length]
|
|
[verible-verilog-lint] rtl/redmule_scheduler.sv#L1445:
rtl/redmule_scheduler.sv#L1445
Remove trailing spaces. [Style: trailing-spaces] [no-trailing-spaces]
|
|
[verible-verilog-lint] rtl/redmule_scheduler.sv#L1455:
rtl/redmule_scheduler.sv#L1455
Line length exceeds max: 100; is: 133 [Style: line-length] [line-length]
|
|
[verible-verilog-lint] rtl/redmule_scheduler.sv#L1489:
rtl/redmule_scheduler.sv#L1489
Remove trailing spaces. [Style: trailing-spaces] [no-trailing-spaces]
|
|
[verible-verilog-lint] rtl/redmule_scheduler.sv#L1494:
rtl/redmule_scheduler.sv#L1494
Line length exceeds max: 100; is: 124 [Style: line-length] [line-length]
|
|
[verible-verilog-lint] rtl/redmule_scheduler.sv#L1494:
rtl/redmule_scheduler.sv#L1494
Remove trailing spaces. [Style: trailing-spaces] [no-trailing-spaces]
|
|
[verible-verilog-lint] rtl/redmule_scheduler.sv#L1505:
rtl/redmule_scheduler.sv#L1505
Binary literal 16'b1 has less digits than expected for 16 bits. [Style: number-literals] [undersized-binary-literal]
|
|
[verible-verilog-lint] rtl/redmule_scheduler.sv#L1505:
rtl/redmule_scheduler.sv#L1505
Line length exceeds max: 100; is: 141 [Style: line-length] [line-length]
|
|
[verible-verilog-lint] rtl/redmule_scheduler.sv#L1509:
rtl/redmule_scheduler.sv#L1509
Line length exceeds max: 100; is: 111 [Style: line-length] [line-length]
|
|
[verible-verilog-lint] rtl/redmule_scheduler.sv#L1515:
rtl/redmule_scheduler.sv#L1515
Remove trailing spaces. [Style: trailing-spaces] [no-trailing-spaces]
|
|
[verible-verilog-lint] rtl/redmule_scheduler.sv#L1517:
rtl/redmule_scheduler.sv#L1517
Remove trailing spaces. [Style: trailing-spaces] [no-trailing-spaces]
|
|
[verible-verilog-lint] rtl/redmule_scheduler.sv#L1518:
rtl/redmule_scheduler.sv#L1518
Remove trailing spaces. [Style: trailing-spaces] [no-trailing-spaces]
|
|
[verible-verilog-lint] rtl/redmule_scheduler.sv#L1561:
rtl/redmule_scheduler.sv#L1561
Remove trailing spaces. [Style: trailing-spaces] [no-trailing-spaces]
|
|
[verible-verilog-lint] rtl/redmule_top.sv#L31:
rtl/redmule_top.sv#L31
Line length exceeds max: 100; is: 115 [Style: line-length] [line-length]
|
|
[verible-verilog-lint] rtl/redmule_top.sv#L35:
rtl/redmule_top.sv#L35
Line length exceeds max: 100; is: 112 [Style: line-length] [line-length]
|
|
[verible-verilog-lint] rtl/redmule_top.sv#L37:
rtl/redmule_top.sv#L37
Line length exceeds max: 100; is: 104 [Style: line-length] [line-length]
|
|
[verible-verilog-lint] rtl/redmule_top.sv#L58:
rtl/redmule_top.sv#L58
Non-type localparam names must be styled with CamelCase [Style: constants] [parameter-name-style]
|
|
[verible-verilog-lint] rtl/redmule_top.sv#L179:
rtl/redmule_top.sv#L179
Remove trailing spaces. [Style: trailing-spaces] [no-trailing-spaces]
|
|
[verible-verilog-lint] rtl/redmule_top.sv#L202:
rtl/redmule_top.sv#L202
Remove trailing spaces. [Style: trailing-spaces] [no-trailing-spaces]
|
|
[verible-verilog-lint] rtl/redmule_top.sv#L206:
rtl/redmule_top.sv#L206
Remove trailing spaces. [Style: trailing-spaces] [no-trailing-spaces]
|
|
[verible-verilog-lint] rtl/redmule_top.sv#L218:
rtl/redmule_top.sv#L218
Remove trailing spaces. [Style: trailing-spaces] [no-trailing-spaces]
|
|
[verible-verilog-lint] rtl/redmule_top.sv#L230:
rtl/redmule_top.sv#L230
Remove trailing spaces. [Style: trailing-spaces] [no-trailing-spaces]
|
|
[verible-verilog-lint] rtl/redmule_top.sv#L238:
rtl/redmule_top.sv#L238
Remove trailing spaces. [Style: trailing-spaces] [no-trailing-spaces]
|
|
[verible-verilog-lint] rtl/redmule_top.sv#L242:
rtl/redmule_top.sv#L242
Remove trailing spaces. [Style: trailing-spaces] [no-trailing-spaces]
|
|
[verible-verilog-lint] rtl/redmule_top.sv#L345:
rtl/redmule_top.sv#L345
Remove trailing spaces. [Style: trailing-spaces] [no-trailing-spaces]
|
|
[verible-verilog-lint] rtl/redmule_top.sv#L362:
rtl/redmule_top.sv#L362
Remove trailing spaces. [Style: trailing-spaces] [no-trailing-spaces]
|
|
[verible-verilog-lint] rtl/redmule_top.sv#L446:
rtl/redmule_top.sv#L446
Remove trailing spaces. [Style: trailing-spaces] [no-trailing-spaces]
|
|
[verible-verilog-lint] rtl/redmule_top.sv#L468:
rtl/redmule_top.sv#L468
Remove trailing spaces. [Style: trailing-spaces] [no-trailing-spaces]
|
|
[verible-verilog-lint] rtl/redmule_top.sv#L478:
rtl/redmule_top.sv#L478
Remove trailing spaces. [Style: trailing-spaces] [no-trailing-spaces]
|
|
lint-sv
Node.js 16 actions are deprecated. Please update the following actions to use Node.js 20: actions/checkout@v3. For more information see: https://github.blog/changelog/2023-09-22-github-actions-transitioning-from-node-16-to-node-20/.
|