v: parser: Fix compile breakages due to verror

raw-bin · Oct 3, 2024 · 6f509e5 · 6f509e5
1 parent 3055d7b
commit 6f509e5
Showing 1 changed file with 4 additions and 4 deletions.
diff --git a/vlib/v/parser/parser.v b/vlib/v/parser/parser.v
@@ -1604,7 +1604,7 @@ fn (mut p Parser) asm_addressing_rv64(disp_type RV64Displacement, disp_val ?stri
 		.int_as_base_no_pars {
 			p.check(.lpar)
 			displacement := ast.AsmArg(ast.AsmDisp {
-				val: disp_val or { verror("Expected displacement string") }
+				val: disp_val or { "Expected displacement string" }
 				pos: p.tok.pos()
 			})
 			base := p.reg_or_alias()
@@ -1619,7 +1619,7 @@ fn (mut p Parser) asm_addressing_rv64(disp_type RV64Displacement, disp_val ?stri
 					ast.IntegerLiteral { ...first_number_lit }
 				}
 				else {
-					verror("Expected displacement integer")
+					util.verror("parser error", "Expected displacement integer")
 				}
 			}
 			match p.tok.kind {
@@ -1653,7 +1653,7 @@ fn (mut p Parser) asm_addressing_rv64(disp_type RV64Displacement, disp_val ?stri
 							ast.IntegerLiteral { ...second_number_lit }
 						}
 						else {
-							verror("Expected displacement integer")
+							util.verror("parser error", "Expected displacement integer")
 						}
 					}
 					displacement := ast.AsmArg(ast.AsmDisp {
@@ -1667,7 +1667,7 @@ fn (mut p Parser) asm_addressing_rv64(disp_type RV64Displacement, disp_val ?stri
 					base, displacement
 				}
 				else {
-					verror("Unsupported or invalid RV64 inline assembly")
+					util.verror("parser error", "Unsupported or invalid RV64 inline assembly")
 				}
 			}
 		}