Skip to content

Commit

Permalink
Replaced regs with wires since tone module output does continuous ass…
Browse files Browse the repository at this point in the history
…ignment
  • Loading branch information
rejunity committed Sep 12, 2023
1 parent e3693d9 commit 8f666da
Showing 1 changed file with 2 additions and 2 deletions.
4 changes: 2 additions & 2 deletions src/tt_um_rejunity_sn76489.v
Original file line number Diff line number Diff line change
Expand Up @@ -29,7 +29,7 @@ module tone #( parameter COUNTER_BITS = 10, parameter VALUE_BITS = 4 ) (
input wire [COUNTER_BITS-1:0] compare,
input wire [VALUE_BITS-1:0] value,

output reg [VALUE_BITS-1:0] out
output wire [VALUE_BITS-1:0] out
);
reg [COUNTER_BITS-1:0] counter;
reg state;
Expand Down Expand Up @@ -137,7 +137,7 @@ module tt_um_rejunity_sn76489 #( parameter NUM_TONES = 3, parameter NUM_NOISES =
end
end

reg [TONE_BITS-1:0] tone_waves [NUM_TONES-1:0];
wire [TONE_BITS-1:0] tone_waves [NUM_TONES-1:0];

genvar i;
generate
Expand Down

0 comments on commit 8f666da

Please sign in to comment.