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spi: add Read and separate-buffers Transfer #287

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merged 1 commit into from
Nov 4, 2021

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Dirbaio
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@Dirbaio Dirbaio commented Jun 22, 2021

Depends on #286

  • Added spi::Read for only reading
  • Renamed Transfer to TransferInplace
  • Added a new Transfer, for reading+writing simultaneously with different buffers.

Open question

  • Should Transactional gain Read, Transfer (not-inplace) support? yes, done

@Dirbaio Dirbaio requested a review from a team as a code owner June 22, 2021 19:48
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Other than my comments below, looks good to me, thanks!
Closes #286

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eldruin previously approved these changes Jun 23, 2021
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Looks good to me, thanks!
Any objections @rust-embedded/hal ?

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thanks for the PR! i'm not convinced all of these are improvements. have left a couple of comments, though it's possible i missed some discussion of this already?

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@Dirbaio Dirbaio changed the title blocking/spi: add Read, ReadWrite, rename Transfer to ReadWriteInplace spi: add Read and separate-buffers Transfer Jun 24, 2021
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burrbull commented Jul 7, 2021

Merge conflicts

@eldruin eldruin added this to the v1.0.0 milestone Jul 9, 2021
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Any chance of this getting into 1.0?

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Dirbaio commented Sep 21, 2021

Rebased. Now that Default is gone, the diff is much smaller :D

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Other than my nitpicks, looks good to me, thanks!
@ryankurte do you have any further concerns about implementation-defined fill values?

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hey generally seems good, one question about the updated docs and, though it appears to be minor changes, i would quite like to see a couple of impls updated to support this to make sure we're not missing anything.

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/// The transfer runs for `max(read.len(), write.len())` words. If `read` is shorter,
/// incoming words after `read` has been filled will be discarded. If `write` is shorter,
/// the value of words sent in MOSI after all `write` has been sent is implementation-defined,
/// typically `0x00`, `0xFF`, or configurable.
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has this always been the case or have we implicitly been assuming read.len() == write.len()? and is this sensible to represent for more complex implementors (ie. using DMA, linux)?

we have Transactional for building sequences, if you need to do varying length things, it would seem to me to be simpler (or maybe, less surprising to demand the same lengths here?

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have we implicitly been assuming read.len() == write.len()?

Before this PR, only the single-buffer Transfer (now TransferInplace) existed. Single-buffer already enforced read len = write len.

The idea for the runs for max(read.len(), write.len()) comes from the nRF SPI DMA, which automatically does this. It's somewhat handy, for example to do "write command byte, read big data" you can make the write buf small (1 byte) and only need memory for a big read buf (1 + N bytes).

I agree it's not that useful if we have TransferInplace or Transactional, and it could be annoying to support using stm32 DMA for example...

If we require same-length for both bufs, do we mandate that impls panic on length mismatch, or return an error?

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This was discussed in today's REWG meeting. TLDR: seems people are OK with differing lengths.

Also the possibility of allowing impls to support it or not was discussed, but IMO it defeats the point since drivers wouldn't be able to use it.

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eldruin commented Nov 2, 2021

@Dirbaio This is good to go! Could you resolve the conflict?

@eldruin eldruin mentioned this pull request Nov 2, 2021
@Dirbaio Dirbaio force-pushed the spi-readwrite branch 2 times, most recently from 151a658 to 459e935 Compare November 3, 2021 13:25
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Dirbaio commented Nov 3, 2021

@eldruin rebased

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eldruin commented Nov 4, 2021

Ach, a new conflict appeared due to the default u8 PR, could you rebase again @Dirbaio ?

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Dirbaio commented Nov 4, 2021

nooooo 🤣

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Dirbaio commented Nov 4, 2021

@eldruin rebased

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Alright, thanks!
bors merge

@bors bors bot merged commit c7497ba into rust-embedded:master Nov 4, 2021
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