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Add support for 64-bit registers #295

Merged
merged 3 commits into from
May 22, 2019
Merged

Add support for 64-bit registers #295

merged 3 commits into from
May 22, 2019

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Disasm
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@Disasm Disasm commented May 14, 2019

Some registers on K210 chip are 64-bit, so it's better to declare them as u64 in SVD for the reasons mentioned here: riscv-rust/k210-pac#1 (comment)
At the moment, svd2rust forbids 64-bit register declarations. This PR fixes this.

This change can cause silent bugs on platforms without 64-bit memory access operations due to the need for proper access sequence to 64-bit registers with two 32-bit accesses.

Closes #289

@Disasm Disasm requested a review from a team as a code owner May 14, 2019 11:31
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r? @ryankurte

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@rust-highfive rust-highfive added S-waiting-on-review Status: Awaiting review from the assignee but also interested parties. T-tools labels May 14, 2019
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laanwj commented May 20, 2019

I tried this on riscv-rust/k210-pac#14 and there was no change at all :/ How to make it pick up that registers for a peripheral are 64 bit?

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Disasm commented May 20, 2019

Seems like <size>64</size> is just ignored at that point. I tested on CLINT and it works fine there.

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laanwj commented May 20, 2019

The difference is that CLINT has both 64-bit and 32-bit registers, DMAC and KPU have only 64-bit registers, so it'd make sense to specify it at the peripheral level. But yes I guess specifying it for every register individually would work.

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Disasm commented May 20, 2019

This <size> specification at the peripheral level is valid, so it should be supported as well. However, I'm not sure at which point this problem happens.

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@Disasm Is there anything we should/can test here wrt to 64bit support?

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bors try

bors bot added a commit that referenced this pull request May 22, 2019
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Disasm commented May 22, 2019

@therealprof I hope that CI is enough. Before this PR 64-bit register declarations led to svd2rust errors, but now they shouldn't. So I assume that this PR shouldn't break anything that wasn't broken before.

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Shouldn't we at least have some files enabled with this PR which exercise this new part of the code?

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Disasm commented May 22, 2019

Ah, OK, I'll add them.

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Disasm commented May 22, 2019

Done!

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bors bot commented May 22, 2019

try

Build succeeded

ci/script.sh Outdated Show resolved Hide resolved
Co-Authored-By: Daniel Egger <daniel@eggers-club.de>
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LGTM, thanks!

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bors r+

bors bot added a commit that referenced this pull request May 22, 2019
295: Add support for 64-bit registers r=therealprof a=Disasm

Some registers on K210 chip are 64-bit, so it's better to declare them as u64 in SVD for the reasons mentioned here: riscv-rust/k210-pac#1 (comment)
At the moment, svd2rust forbids 64-bit register declarations. This PR fixes this.

This change can cause silent bugs on platforms without 64-bit memory access operations due to the need for proper access sequence to 64-bit registers with two 32-bit accesses.

Closes #289

Co-authored-by: Vadim Kaushan <admin@disasm.info>
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bors bot commented May 22, 2019

Build succeeded

@bors bors bot merged commit 6dc10b8 into master May 22, 2019
@bors bors bot deleted the 64bit-registers branch May 22, 2019 14:39
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Support for 64-bit registers
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