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Auto merge of #116598 - matthiaskrgr:rollup-6xra4jx, r=matthiaskrgr
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Rollup of 4 pull requests

Successful merges:

 - #116586 (use env variable to control thread ids in rustc_log)
 - #116589 (coverage: Unbox and simplify `bcb_filtered_successors`)
 - #116595 (-Zmir-enable-passes: document that this may enable unsound passes)
 - #116596 (reorder files in solve)

r? `@ghost`
`@rustbot` modify labels: rollup
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bors committed Oct 10, 2023
2 parents 061c330 + da42858 commit 5b88d65
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Showing 14 changed files with 60 additions and 91 deletions.
11 changes: 8 additions & 3 deletions compiler/rustc_log/src/lib.rs
Original file line number Diff line number Diff line change
Expand Up @@ -74,16 +74,21 @@ pub fn init_env_logger(env: &str) -> Result<(), Error> {
Some(v) => &v != "0",
};

let verbose_thread_ids = match env::var_os(String::from(env) + "_THREAD_IDS") {
None => false,
Some(v) => &v == "1",
};

let layer = tracing_tree::HierarchicalLayer::default()
.with_writer(io::stderr)
.with_indent_lines(true)
.with_ansi(color_logs)
.with_targets(true)
.with_verbose_exit(verbose_entry_exit)
.with_verbose_entry(verbose_entry_exit)
.with_indent_amount(2);
#[cfg(all(parallel_compiler, debug_assertions))]
let layer = layer.with_thread_ids(true).with_thread_names(true);
.with_indent_amount(2)
.with_thread_ids(verbose_thread_ids)
.with_thread_names(verbose_thread_ids);

let subscriber = tracing_subscriber::Registry::default().with(filter).with(layer);
match env::var(format!("{env}_BACKTRACE")) {
Expand Down
116 changes: 37 additions & 79 deletions compiler/rustc_mir_transform/src/coverage/graph.rs
Original file line number Diff line number Diff line change
@@ -1,8 +1,9 @@
use rustc_data_structures::captures::Captures;
use rustc_data_structures::graph::dominators::{self, Dominators};
use rustc_data_structures::graph::{self, GraphSuccessors, WithNumNodes, WithStartNode};
use rustc_index::bit_set::BitSet;
use rustc_index::{IndexSlice, IndexVec};
use rustc_middle::mir::{self, BasicBlock, BasicBlockData, Terminator, TerminatorKind};
use rustc_middle::mir::{self, BasicBlock, TerminatorKind};

use std::cmp::Ordering;
use std::ops::{Index, IndexMut};
Expand Down Expand Up @@ -36,9 +37,8 @@ impl CoverageGraph {
}
let bcb_data = &bcbs[bcb];
let mut bcb_successors = Vec::new();
for successor in
bcb_filtered_successors(&mir_body, &bcb_data.terminator(mir_body).kind)
.filter_map(|successor_bb| bb_to_bcb[successor_bb])
for successor in bcb_filtered_successors(&mir_body, bcb_data.last_bb())
.filter_map(|successor_bb| bb_to_bcb[successor_bb])
{
if !seen[successor] {
seen[successor] = true;
Expand Down Expand Up @@ -80,10 +80,9 @@ impl CoverageGraph {
// intentionally omits unwind paths.
// FIXME(#78544): MIR InstrumentCoverage: Improve coverage of `#[should_panic]` tests and
// `catch_unwind()` handlers.
let mir_cfg_without_unwind = ShortCircuitPreorder::new(&mir_body, bcb_filtered_successors);

let mut basic_blocks = Vec::new();
for (bb, data) in mir_cfg_without_unwind {
for bb in short_circuit_preorder(mir_body, bcb_filtered_successors) {
if let Some(last) = basic_blocks.last() {
let predecessors = &mir_body.basic_blocks.predecessors()[bb];
if predecessors.len() > 1 || !predecessors.contains(last) {
Expand All @@ -109,7 +108,7 @@ impl CoverageGraph {
}
basic_blocks.push(bb);

let term = data.terminator();
let term = mir_body[bb].terminator();

match term.kind {
TerminatorKind::Return { .. }
Expand Down Expand Up @@ -316,11 +315,6 @@ impl BasicCoverageBlockData {
pub fn last_bb(&self) -> BasicBlock {
*self.basic_blocks.last().unwrap()
}

#[inline(always)]
pub fn terminator<'a, 'tcx>(&self, mir_body: &'a mir::Body<'tcx>) -> &'a Terminator<'tcx> {
&mir_body[self.last_bb()].terminator()
}
}

/// Represents a successor from a branching BasicCoverageBlock (such as the arms of a `SwitchInt`)
Expand Down Expand Up @@ -362,26 +356,28 @@ impl std::fmt::Debug for BcbBranch {
}
}

// Returns the `Terminator`s non-unwind successors.
// Returns the subset of a block's successors that are relevant to the coverage
// graph, i.e. those that do not represent unwinds or unreachable branches.
// FIXME(#78544): MIR InstrumentCoverage: Improve coverage of `#[should_panic]` tests and
// `catch_unwind()` handlers.
fn bcb_filtered_successors<'a, 'tcx>(
body: &'a mir::Body<'tcx>,
term_kind: &'a TerminatorKind<'tcx>,
) -> Box<dyn Iterator<Item = BasicBlock> + 'a> {
Box::new(
match &term_kind {
// SwitchInt successors are never unwind, and all of them should be traversed.
TerminatorKind::SwitchInt { ref targets, .. } => {
None.into_iter().chain(targets.all_targets().into_iter().copied())
}
// For all other kinds, return only the first successor, if any, and ignore unwinds.
// NOTE: `chain(&[])` is required to coerce the `option::iter` (from
// `next().into_iter()`) into the `mir::Successors` aliased type.
_ => term_kind.successors().next().into_iter().chain((&[]).into_iter().copied()),
}
.filter(move |&successor| body[successor].terminator().kind != TerminatorKind::Unreachable),
)
bb: BasicBlock,
) -> impl Iterator<Item = BasicBlock> + Captures<'a> + Captures<'tcx> {
let terminator = body[bb].terminator();

let take_n_successors = match terminator.kind {
// SwitchInt successors are never unwinds, so all of them should be traversed.
TerminatorKind::SwitchInt { .. } => usize::MAX,
// For all other kinds, return only the first successor (if any), ignoring any
// unwind successors.
_ => 1,
};

terminator
.successors()
.take(take_n_successors)
.filter(move |&successor| body[successor].terminator().kind != TerminatorKind::Unreachable)
}

/// Maintains separate worklists for each loop in the BasicCoverageBlock CFG, plus one for the
Expand Down Expand Up @@ -553,66 +549,28 @@ pub(super) fn find_loop_backedges(
backedges
}

pub struct ShortCircuitPreorder<
'a,
'tcx,
F: Fn(&'a mir::Body<'tcx>, &'a TerminatorKind<'tcx>) -> Box<dyn Iterator<Item = BasicBlock> + 'a>,
> {
fn short_circuit_preorder<'a, 'tcx, F, Iter>(
body: &'a mir::Body<'tcx>,
visited: BitSet<BasicBlock>,
worklist: Vec<BasicBlock>,
filtered_successors: F,
}

impl<
'a,
'tcx,
F: Fn(&'a mir::Body<'tcx>, &'a TerminatorKind<'tcx>) -> Box<dyn Iterator<Item = BasicBlock> + 'a>,
> ShortCircuitPreorder<'a, 'tcx, F>
) -> impl Iterator<Item = BasicBlock> + Captures<'a> + Captures<'tcx>
where
F: Fn(&'a mir::Body<'tcx>, BasicBlock) -> Iter,
Iter: Iterator<Item = BasicBlock>,
{
pub fn new(
body: &'a mir::Body<'tcx>,
filtered_successors: F,
) -> ShortCircuitPreorder<'a, 'tcx, F> {
let worklist = vec![mir::START_BLOCK];

ShortCircuitPreorder {
body,
visited: BitSet::new_empty(body.basic_blocks.len()),
worklist,
filtered_successors,
}
}
}

impl<
'a,
'tcx,
F: Fn(&'a mir::Body<'tcx>, &'a TerminatorKind<'tcx>) -> Box<dyn Iterator<Item = BasicBlock> + 'a>,
> Iterator for ShortCircuitPreorder<'a, 'tcx, F>
{
type Item = (BasicBlock, &'a BasicBlockData<'tcx>);
let mut visited = BitSet::new_empty(body.basic_blocks.len());
let mut worklist = vec![mir::START_BLOCK];

fn next(&mut self) -> Option<(BasicBlock, &'a BasicBlockData<'tcx>)> {
while let Some(idx) = self.worklist.pop() {
if !self.visited.insert(idx) {
std::iter::from_fn(move || {
while let Some(bb) = worklist.pop() {
if !visited.insert(bb) {
continue;
}

let data = &self.body[idx];

if let Some(ref term) = data.terminator {
self.worklist.extend((self.filtered_successors)(&self.body, &term.kind));
}
worklist.extend(filtered_successors(body, bb));

return Some((idx, data));
return Some(bb);
}

None
}

fn size_hint(&self) -> (usize, Option<usize>) {
let size = self.body.basic_blocks.len() - self.visited.count();
(size, Some(size))
}
})
}
2 changes: 1 addition & 1 deletion compiler/rustc_mir_transform/src/coverage/tests.rs
Original file line number Diff line number Diff line change
Expand Up @@ -241,7 +241,7 @@ fn print_coverage_graphviz(
" {:?} [label=\"{:?}: {}\"];\n{}",
bcb,
bcb,
bcb_data.terminator(mir_body).kind.name(),
mir_body[bcb_data.last_bb()].terminator().kind.name(),
basic_coverage_blocks
.successors(bcb)
.map(|successor| { format!(" {:?} -> {:?};", bcb, successor) })
Expand Down
1 change: 1 addition & 0 deletions compiler/rustc_mir_transform/src/early_otherwise_branch.rs
Original file line number Diff line number Diff line change
Expand Up @@ -95,6 +95,7 @@ pub struct EarlyOtherwiseBranch;

impl<'tcx> MirPass<'tcx> for EarlyOtherwiseBranch {
fn is_enabled(&self, sess: &rustc_session::Session) -> bool {
// unsound: https://github.com/rust-lang/rust/issues/95162
sess.mir_opt_level() >= 3 && sess.opts.unstable_opts.unsound_mir_opts
}

Expand Down
3 changes: 3 additions & 0 deletions compiler/rustc_mir_transform/src/large_enums.rs
Original file line number Diff line number Diff line change
Expand Up @@ -30,6 +30,9 @@ pub struct EnumSizeOpt {

impl<'tcx> MirPass<'tcx> for EnumSizeOpt {
fn is_enabled(&self, sess: &Session) -> bool {
// There are some differences in behavior on wasm and ARM that are not properly
// understood, so we conservatively treat this optimization as unsound:
// https://github.com/rust-lang/rust/pull/85158#issuecomment-1101836457
sess.opts.unstable_opts.unsound_mir_opts || sess.mir_opt_level() >= 3
}
fn run_pass(&self, tcx: TyCtxt<'tcx>, body: &mut Body<'tcx>) {
Expand Down
2 changes: 1 addition & 1 deletion compiler/rustc_mir_transform/src/nrvo.rs
Original file line number Diff line number Diff line change
Expand Up @@ -34,7 +34,7 @@ pub struct RenameReturnPlace;

impl<'tcx> MirPass<'tcx> for RenameReturnPlace {
fn is_enabled(&self, sess: &rustc_session::Session) -> bool {
// #111005
// unsound: #111005
sess.mir_opt_level() > 0 && sess.opts.unstable_opts.unsound_mir_opts
}

Expand Down
7 changes: 4 additions & 3 deletions compiler/rustc_session/src/options.rs
Original file line number Diff line number Diff line change
Expand Up @@ -1599,9 +1599,10 @@ options! {
"emit Retagging MIR statements, interpreted e.g., by miri; implies -Zmir-opt-level=0 \
(default: no)"),
mir_enable_passes: Vec<(String, bool)> = (Vec::new(), parse_list_with_polarity, [TRACKED],
"use like `-Zmir-enable-passes=+DestinationPropagation,-InstSimplify`. Forces the specified passes to be \
enabled, overriding all other checks. Passes that are not specified are enabled or \
disabled by other flags as usual."),
"use like `-Zmir-enable-passes=+DestinationPropagation,-InstSimplify`. Forces the \
specified passes to be enabled, overriding all other checks. In particular, this will \
enable unsound (known-buggy and hence usually disabled) passes without further warning! \
Passes that are not specified are enabled or disabled by other flags as usual."),
mir_include_spans: bool = (false, parse_bool, [UNTRACKED],
"use line numbers relative to the function in mir pretty printing"),
mir_keep_place_mention: bool = (false, parse_bool, [TRACKED],
Expand Down
3 changes: 0 additions & 3 deletions compiler/rustc_trait_selection/src/solve/mod.rs
Original file line number Diff line number Diff line change
Expand Up @@ -32,14 +32,11 @@ mod assembly;
mod canonicalize;
mod eval_ctxt;
mod fulfill;
mod inherent_projection;
pub mod inspect;
mod normalize;
mod opaques;
mod project_goals;
mod search_graph;
mod trait_goals;
mod weak_types;

pub use eval_ctxt::{
EvalCtxt, GenerateProofTree, InferCtxtEvalExt, InferCtxtSelectExt, UseGlobalCache,
Expand Down
Original file line number Diff line number Diff line change
Expand Up @@ -18,6 +18,10 @@ use rustc_middle::ty::{self, Ty, TyCtxt};
use rustc_middle::ty::{ToPredicate, TypeVisitableExt};
use rustc_span::{sym, ErrorGuaranteed, DUMMY_SP};

mod inherent_projection;
mod opaques;
mod weak_types;

impl<'tcx> EvalCtxt<'_, 'tcx> {
#[instrument(level = "debug", skip(self), ret)]
pub(super) fn compute_projection_goal(
Expand Down
Original file line number Diff line number Diff line change
Expand Up @@ -7,7 +7,7 @@ use rustc_middle::traits::Reveal;
use rustc_middle::ty;
use rustc_middle::ty::util::NotUniqueParam;

use super::{EvalCtxt, SolverMode};
use crate::solve::{EvalCtxt, SolverMode};

impl<'tcx> EvalCtxt<'_, 'tcx> {
pub(super) fn normalize_opaque_type(
Expand Down

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