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Rollup of 8 pull requests #101026

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e540425
Add a `File::create_new` constructor
joshtriplett Jul 2, 2022
fab36d1
Add comments about stdout locking
sigaloid Jul 26, 2022
bafb10d
fix an outdated machine hook name
RalfJung Jul 27, 2022
d34df43
remove enforce_number_init machine hook that Miri no longer needs
RalfJung Jul 27, 2022
c542245
remove some now-unnecessary parameters from check_bytes
RalfJung Jul 27, 2022
8654522
make read_immediate error immediately on uninit, so ImmTy can carry i…
RalfJung Aug 1, 2022
c11fa89
remove now-unused ScalarMaybeUninit
RalfJung Aug 2, 2022
73ae38b
Migrate ast_lowering::path to SessionDiagnostic
JeanCASPAR Aug 16, 2022
0043d10
Migrate ast_lowering::lib and ast_lowering::item to SessionDiagnostic
JeanCASPAR Aug 17, 2022
1382d30
Migrate ast_lowering::expr to SessionDiagnostic
JeanCASPAR Aug 17, 2022
d75fd91
Migrate ast_lowering::ast to SessionDiagnostic
JeanCASPAR Aug 17, 2022
5164966
Migrate ast_lowering::pat to SessionDiagnostic
JeanCASPAR Aug 18, 2022
e701c72
Migrate all span_err(...) in ast_lowering to SessionDiagnostic
JeanCASPAR Aug 18, 2022
9472df1
Changes made in response to feedback
JeanCASPAR Aug 19, 2022
5fef1b8
Resolve conflicts
JeanCASPAR Aug 22, 2022
cb4cd73
extra sanity check against consts pointing to mutable memory
RalfJung Aug 23, 2022
4e97626
Call them constants instead of types
compiler-errors Aug 12, 2022
4ff5872
Note binding obligation causes for const equate errors
compiler-errors Aug 12, 2022
d464d3a
Add test for #100414
compiler-errors Aug 12, 2022
8189a45
Use ExprItemObligation and ExprBindingObligation too
compiler-errors Aug 23, 2022
d82e6b3
Add `IsTerminal` trait to determine if a descriptor or handle is a te…
joshtriplett Jun 12, 2022
a7e5dc2
Make is_terminal fail fast if a process has no console at all
joshtriplett Jun 20, 2022
6c5c32b
Rewrite FILE_NAME_INFO handling to avoid enlarging slice reference
joshtriplett Aug 24, 2022
8c65478
rustdoc: remove unused CSS for `.variants_table`
notriddle Aug 25, 2022
f489703
Rollup merge of #98033 - joshtriplett:is-terminal-fd-handle, r=thomcc
Dylan-DPC Aug 26, 2022
5050988
Rollup merge of #98801 - joshtriplett:file-create-new, r=thomcc
Dylan-DPC Aug 26, 2022
b464d5f
Rollup merge of #99742 - sigaloid:master, r=thomcc
Dylan-DPC Aug 26, 2022
6a5521f
Rollup merge of #100043 - RalfJung:scalar-always-init, r=oli-obk
Dylan-DPC Aug 26, 2022
57d438f
Rollup merge of #100437 - compiler-errors:better-const-mismatch-err, …
Dylan-DPC Aug 26, 2022
ef95092
Rollup merge of #100724 - JeanCASPAR:migrate-ast_lowering-to-session-…
Dylan-DPC Aug 26, 2022
2122c6e
Rollup merge of #100897 - RalfJung:const-not-to-mutable, r=lcnr
Dylan-DPC Aug 26, 2022
b125b05
Rollup merge of #101012 - notriddle:notriddle/variants_table, r=jsha
Dylan-DPC Aug 26, 2022
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1 change: 1 addition & 0 deletions Cargo.lock
Original file line number Diff line number Diff line change
@@ -3575,6 +3575,7 @@ dependencies = [
"rustc_errors",
"rustc_hir",
"rustc_index",
"rustc_macros",
"rustc_middle",
"rustc_query_system",
"rustc_session",
1 change: 1 addition & 0 deletions compiler/rustc_ast_lowering/Cargo.toml
Original file line number Diff line number Diff line change
@@ -15,6 +15,7 @@ rustc_target = { path = "../rustc_target" }
rustc_data_structures = { path = "../rustc_data_structures" }
rustc_index = { path = "../rustc_index" }
rustc_middle = { path = "../rustc_middle" }
rustc_macros = { path = "../rustc_macros" }
rustc_query_system = { path = "../rustc_query_system" }
rustc_span = { path = "../rustc_span" }
rustc_errors = { path = "../rustc_errors" }
179 changes: 74 additions & 105 deletions compiler/rustc_ast_lowering/src/asm.rs
Original file line number Diff line number Diff line change
@@ -1,11 +1,17 @@
use crate::{ImplTraitContext, ImplTraitPosition, ParamMode, ResolverAstLoweringExt};

use super::errors::{
AbiSpecifiedMultipleTimes, AttSyntaxOnlyX86, ClobberAbiNotSupported,
InlineAsmUnsupportedTarget, InvalidAbiClobberAbi, InvalidAsmTemplateModifierConst,
InvalidAsmTemplateModifierRegClass, InvalidAsmTemplateModifierRegClassSub,
InvalidAsmTemplateModifierSym, InvalidRegister, InvalidRegisterClass, RegisterClassOnlyClobber,
RegisterConflict,
};
use super::LoweringContext;

use rustc_ast::ptr::P;
use rustc_ast::*;
use rustc_data_structures::fx::{FxHashMap, FxHashSet};
use rustc_errors::struct_span_err;
use rustc_hir as hir;
use rustc_hir::def::{DefKind, Res};
use rustc_hir::definitions::DefPathData;
@@ -26,13 +32,7 @@ impl<'a, 'hir> LoweringContext<'a, 'hir> {
let asm_arch =
if self.tcx.sess.opts.actually_rustdoc { None } else { self.tcx.sess.asm_arch };
if asm_arch.is_none() && !self.tcx.sess.opts.actually_rustdoc {
struct_span_err!(
self.tcx.sess,
sp,
E0472,
"inline assembly is unsupported on this target"
)
.emit();
self.tcx.sess.emit_err(InlineAsmUnsupportedTarget { span: sp });
}
if let Some(asm_arch) = asm_arch {
// Inline assembly is currently only stable for these architectures.
@@ -59,10 +59,7 @@ impl<'a, 'hir> LoweringContext<'a, 'hir> {
&& !matches!(asm_arch, Some(asm::InlineAsmArch::X86 | asm::InlineAsmArch::X86_64))
&& !self.tcx.sess.opts.actually_rustdoc
{
self.tcx
.sess
.struct_span_err(sp, "the `att_syntax` option is only supported on x86")
.emit();
self.tcx.sess.emit_err(AttSyntaxOnlyX86 { span: sp });
}
if asm.options.contains(InlineAsmOptions::MAY_UNWIND) && !self.tcx.features().asm_unwind {
feature_err(
@@ -82,51 +79,37 @@ impl<'a, 'hir> LoweringContext<'a, 'hir> {
// If the abi was already in the list, emit an error
match clobber_abis.get(&abi) {
Some((prev_name, prev_sp)) => {
let mut err = self.tcx.sess.struct_span_err(
*abi_span,
&format!("`{}` ABI specified multiple times", prev_name),
);
err.span_label(*prev_sp, "previously specified here");

// Multiple different abi names may actually be the same ABI
// If the specified ABIs are not the same name, alert the user that they resolve to the same ABI
let source_map = self.tcx.sess.source_map();
if source_map.span_to_snippet(*prev_sp)
!= source_map.span_to_snippet(*abi_span)
{
err.note("these ABIs are equivalent on the current target");
}
let equivalent = (source_map.span_to_snippet(*prev_sp)
!= source_map.span_to_snippet(*abi_span))
.then_some(());

err.emit();
self.tcx.sess.emit_err(AbiSpecifiedMultipleTimes {
abi_span: *abi_span,
prev_name: *prev_name,
prev_span: *prev_sp,
equivalent,
});
}
None => {
clobber_abis.insert(abi, (abi_name, *abi_span));
clobber_abis.insert(abi, (*abi_name, *abi_span));
}
}
}
Err(&[]) => {
self.tcx
.sess
.struct_span_err(
*abi_span,
"`clobber_abi` is not supported on this target",
)
.emit();
self.tcx.sess.emit_err(ClobberAbiNotSupported { abi_span: *abi_span });
}
Err(supported_abis) => {
let mut err = self
.tcx
.sess
.struct_span_err(*abi_span, "invalid ABI for `clobber_abi`");
let mut abis = format!("`{}`", supported_abis[0]);
for m in &supported_abis[1..] {
let _ = write!(abis, ", `{}`", m);
}
err.note(&format!(
"the following ABIs are supported on this target: {}",
abis
));
err.emit();
self.tcx.sess.emit_err(InvalidAbiClobberAbi {
abi_span: *abi_span,
supported_abis: abis,
});
}
}
}
@@ -141,24 +124,28 @@ impl<'a, 'hir> LoweringContext<'a, 'hir> {
.iter()
.map(|(op, op_sp)| {
let lower_reg = |reg| match reg {
InlineAsmRegOrRegClass::Reg(s) => {
InlineAsmRegOrRegClass::Reg(reg) => {
asm::InlineAsmRegOrRegClass::Reg(if let Some(asm_arch) = asm_arch {
asm::InlineAsmReg::parse(asm_arch, s).unwrap_or_else(|e| {
let msg = format!("invalid register `{}`: {}", s, e);
sess.struct_span_err(*op_sp, &msg).emit();
asm::InlineAsmReg::parse(asm_arch, reg).unwrap_or_else(|error| {
sess.emit_err(InvalidRegister { op_span: *op_sp, reg, error });
asm::InlineAsmReg::Err
})
} else {
asm::InlineAsmReg::Err
})
}
InlineAsmRegOrRegClass::RegClass(s) => {
InlineAsmRegOrRegClass::RegClass(reg_class) => {
asm::InlineAsmRegOrRegClass::RegClass(if let Some(asm_arch) = asm_arch {
asm::InlineAsmRegClass::parse(asm_arch, s).unwrap_or_else(|e| {
let msg = format!("invalid register class `{}`: {}", s, e);
sess.struct_span_err(*op_sp, &msg).emit();
asm::InlineAsmRegClass::Err
})
asm::InlineAsmRegClass::parse(asm_arch, reg_class).unwrap_or_else(
|error| {
sess.emit_err(InvalidRegisterClass {
op_span: *op_sp,
reg_class,
error,
});
asm::InlineAsmRegClass::Err
},
)
} else {
asm::InlineAsmRegClass::Err
})
@@ -282,50 +269,39 @@ impl<'a, 'hir> LoweringContext<'a, 'hir> {
}
let valid_modifiers = class.valid_modifiers(asm_arch.unwrap());
if !valid_modifiers.contains(&modifier) {
let mut err = sess.struct_span_err(
placeholder_span,
"invalid asm template modifier for this register class",
);
err.span_label(placeholder_span, "template modifier");
err.span_label(op_sp, "argument");
if !valid_modifiers.is_empty() {
let sub = if !valid_modifiers.is_empty() {
let mut mods = format!("`{}`", valid_modifiers[0]);
for m in &valid_modifiers[1..] {
let _ = write!(mods, ", `{}`", m);
}
err.note(&format!(
"the `{}` register class supports \
the following template modifiers: {}",
class.name(),
mods
));
InvalidAsmTemplateModifierRegClassSub::SupportModifier {
class_name: class.name(),
modifiers: mods,
}
} else {
err.note(&format!(
"the `{}` register class does not support template modifiers",
class.name()
));
}
err.emit();
InvalidAsmTemplateModifierRegClassSub::DoesNotSupportModifier {
class_name: class.name(),
}
};
sess.emit_err(InvalidAsmTemplateModifierRegClass {
placeholder_span,
op_span: op_sp,
sub,
});
}
}
hir::InlineAsmOperand::Const { .. } => {
let mut err = sess.struct_span_err(
sess.emit_err(InvalidAsmTemplateModifierConst {
placeholder_span,
"asm template modifiers are not allowed for `const` arguments",
);
err.span_label(placeholder_span, "template modifier");
err.span_label(op_sp, "argument");
err.emit();
op_span: op_sp,
});
}
hir::InlineAsmOperand::SymFn { .. }
| hir::InlineAsmOperand::SymStatic { .. } => {
let mut err = sess.struct_span_err(
sess.emit_err(InvalidAsmTemplateModifierSym {
placeholder_span,
"asm template modifiers are not allowed for `sym` arguments",
);
err.span_label(placeholder_span, "template modifier");
err.span_label(op_sp, "argument");
err.emit();
op_span: op_sp,
});
}
}
}
@@ -346,12 +322,10 @@ impl<'a, 'hir> LoweringContext<'a, 'hir> {
// require that the operand name an explicit register, not a
// register class.
if reg_class.is_clobber_only(asm_arch.unwrap()) && !op.is_clobber() {
let msg = format!(
"register class `{}` can only be used as a clobber, \
not as an input or output",
reg_class.name()
);
sess.struct_span_err(op_sp, &msg).emit();
sess.emit_err(RegisterClassOnlyClobber {
op_span: op_sp,
reg_class_name: reg_class.name(),
});
continue;
}

@@ -391,16 +365,7 @@ impl<'a, 'hir> LoweringContext<'a, 'hir> {
unreachable!();
};

let msg = format!(
"register `{}` conflicts with register `{}`",
reg.name(),
reg2.name()
);
let mut err = sess.struct_span_err(op_sp, &msg);
err.span_label(op_sp, &format!("register `{}`", reg.name()));
err.span_label(op_sp2, &format!("register `{}`", reg2.name()));

match (op, op2) {
let in_out = match (op, op2) {
(
hir::InlineAsmOperand::In { .. },
hir::InlineAsmOperand::Out { late, .. },
@@ -411,14 +376,18 @@ impl<'a, 'hir> LoweringContext<'a, 'hir> {
) => {
assert!(!*late);
let out_op_sp = if input { op_sp2 } else { op_sp };
let msg = "use `lateout` instead of \
`out` to avoid conflict";
err.span_help(out_op_sp, msg);
}
_ => {}
}
Some(out_op_sp)
},
_ => None,
};

err.emit();
sess.emit_err(RegisterConflict {
op_span1: op_sp,
op_span2: op_sp2,
reg1_name: reg.name(),
reg2_name: reg2.name(),
in_out
});
}
Entry::Vacant(v) => {
if r == reg {
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