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Simplify the unchecked_sh[lr] ub-checks a bit #125559

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May 27, 2024
Merged

Simplify the unchecked_sh[lr] ub-checks a bit #125559

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6 changes: 2 additions & 4 deletions library/core/src/num/int_macros.rs
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Original file line number Diff line number Diff line change
Expand Up @@ -1282,8 +1282,7 @@ macro_rules! int_impl {
concat!(stringify!($SelfT), "::unchecked_shl cannot overflow"),
(
rhs: u32 = rhs,
bits: u32 = Self::BITS,
) => rhs < bits,
) => rhs < <$ActualT>::BITS,
);

// SAFETY: this is guaranteed to be safe by the caller.
Expand Down Expand Up @@ -1381,8 +1380,7 @@ macro_rules! int_impl {
concat!(stringify!($SelfT), "::unchecked_shr cannot overflow"),
(
rhs: u32 = rhs,
bits: u32 = Self::BITS,
) => rhs < bits,
) => rhs < <$ActualT>::BITS,
);

// SAFETY: this is guaranteed to be safe by the caller.
Expand Down
6 changes: 2 additions & 4 deletions library/core/src/num/uint_macros.rs
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Expand Up @@ -1369,8 +1369,7 @@ macro_rules! uint_impl {
concat!(stringify!($SelfT), "::unchecked_shl cannot overflow"),
(
rhs: u32 = rhs,
bits: u32 = Self::BITS,
) => rhs < bits,
) => rhs < <$ActualT>::BITS,
);

// SAFETY: this is guaranteed to be safe by the caller.
Expand Down Expand Up @@ -1468,8 +1467,7 @@ macro_rules! uint_impl {
concat!(stringify!($SelfT), "::unchecked_shr cannot overflow"),
(
rhs: u32 = rhs,
bits: u32 = Self::BITS,
) => rhs < bits,
) => rhs < <$ActualT>::BITS,
);

// SAFETY: this is guaranteed to be safe by the caller.
Expand Down
2 changes: 1 addition & 1 deletion tests/mir-opt/inline/unchecked_shifts.unchecked_shl_unsigned_smaller.Inline.panic-abort.diff
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Expand Up @@ -29,7 +29,7 @@
}

bb1: {
+ _6 = core::num::<impl u16>::unchecked_shl::precondition_check(_4, const core::num::<impl u16>::BITS) -> [return: bb2, unwind unreachable];
+ _6 = core::num::<impl u16>::unchecked_shl::precondition_check(_4) -> [return: bb2, unwind unreachable];
+ }
+
+ bb2: {
Expand Down
2 changes: 1 addition & 1 deletion ...s/mir-opt/inline/unchecked_shifts.unchecked_shl_unsigned_smaller.Inline.panic-unwind.diff
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Original file line number Diff line number Diff line change
Expand Up @@ -29,7 +29,7 @@
}

bb1: {
+ _6 = core::num::<impl u16>::unchecked_shl::precondition_check(_4, const core::num::<impl u16>::BITS) -> [return: bb2, unwind unreachable];
+ _6 = core::num::<impl u16>::unchecked_shl::precondition_check(_4) -> [return: bb2, unwind unreachable];
+ }
+
+ bb2: {
Expand Down
2 changes: 1 addition & 1 deletion tests/mir-opt/inline/unchecked_shifts.unchecked_shr_signed_bigger.Inline.panic-abort.diff
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Original file line number Diff line number Diff line change
Expand Up @@ -29,7 +29,7 @@
}

bb1: {
+ _6 = core::num::<impl i64>::unchecked_shr::precondition_check(_4, const core::num::<impl i64>::BITS) -> [return: bb2, unwind unreachable];
+ _6 = core::num::<impl i64>::unchecked_shr::precondition_check(_4) -> [return: bb2, unwind unreachable];
+ }
+
+ bb2: {
Expand Down
2 changes: 1 addition & 1 deletion tests/mir-opt/inline/unchecked_shifts.unchecked_shr_signed_bigger.Inline.panic-unwind.diff
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Original file line number Diff line number Diff line change
Expand Up @@ -29,7 +29,7 @@
}

bb1: {
+ _6 = core::num::<impl i64>::unchecked_shr::precondition_check(_4, const core::num::<impl i64>::BITS) -> [return: bb2, unwind unreachable];
+ _6 = core::num::<impl i64>::unchecked_shr::precondition_check(_4) -> [return: bb2, unwind unreachable];
+ }
+
+ bb2: {
Expand Down
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