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tests: Fix the SIMD FFI tests with certain x86 configuration #133053
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... that do not have SSE2 support (e.g. i586)
This PR modifies cc @jieyouxu |
@rustbot label A-SIMD O-x86_32 |
I see. @bors r+ rollup |
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Sorry, I had some skill issues ™️ managing the |
@bors r- |
@liushuyu Your previous revision seems more correct, some x86-64 targets do not enable sse2 |
granted, we don't run tests on most bare metal targets, but still |
According to https://gitlab.com/x86-psABIs/x86-64-ABI, at least on Linux, "x86_64 (baseline)" means SSE + SSE2. I could not find information for Windows, but according to https://en.wikipedia.org/wiki/X86-64#AMD64 it seems like SSE registers are a standard at least for AMD64. |
Oh, sorry, you meant freestanding implementations, my bad. I will change the test. |
... to do more comprehensive type checking
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Done. The test is updated to gate both |
Thanks! @bors r+ rollup |
…kingjubilee Rollup of 8 pull requests Successful merges: - rust-lang#132790 (Add as_slice/into_slice for IoSlice/IoSliceMut.) - rust-lang#132905 ([AIX] Add crate "unwind" to link with libunwind) - rust-lang#132977 (Fix compilation error on Solaris due to flock usage) - rust-lang#132984 ([illumos] use pipe2 to create anonymous pipes) - rust-lang#133019 (docs: Fix missing period and colon in methods for primitive types) - rust-lang#133048 (use `&raw` in `{read, write}_unaligned` documentation) - rust-lang#133050 (Always inline functions signatures containing `f16` or `f128`) - rust-lang#133053 (tests: Fix the SIMD FFI tests with certain x86 configuration) r? `@ghost` `@rustbot` modify labels: rollup
Rollup merge of rust-lang#133053 - liushuyu:simd-test-x86-baseline-fix, r=workingjubilee tests: Fix the SIMD FFI tests with certain x86 configuration This pull request fixes the SIMD FFI tests with certain x86 configurations by gating the SSE2 intrinsic behind the `sse2` feature gate. A generic LLVM intrinsic that is easy to un-fuse on those platforms is added to compensate for those platforms.
This pull request fixes the SIMD FFI tests with certain x86 configurations by gating the SSE2 intrinsic behind the
sse2
feature gate. A generic LLVM intrinsic that is easy to un-fuse on those platforms is added to compensate for those platforms.