Implement checked Shl/Shr on SIMD types #26198
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Thanks for the pull request, and welcome! The Rust team is excited to review your changes, and you should hear from @huonw (or someone else) soon. If any changes to this PR are deemed necessary, please add them as extra commits. This ensures that the reviewer can see what has changed since they last reviewed the code. The way Github handles out-of-date commits, this should also make it reasonably obvious what issues have or haven't been addressed. Large or tricky changes may require several passes of review and changes. Please see the contribution instructions for more information. |
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The generated check is somewhat heavy: a checked shift on a Is there a better way to check if a vector contains a nonzero element? Or is it not even worth worrying about? The check is only generated when |
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I'm pretty sure there is a better way, but I'm very happy to just merge this as is having opened an issue and adding a |
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Figured it out. I didn't know about LLVM's |
| TypeKind::Integer => ICmp(bcx, llvm::IntNE, value, C_null(llty), binop_debug_loc), | ||
| TypeKind::Vector => { | ||
| let width = llty.vector_length() as u64 * llty.element_type().int_width(); | ||
| let int_value = BitCast(bcx, value, Type::ix(bcx.ccx(), width)); |
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Neat trick; could you add a comment describing what's happening? ("check non-zeroness by treating the SIMD vector as one large integer and comparing that".)
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Looks great! Could you squash the commits down to one? |
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All set. |
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@bors r+ Thanks! |
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📌 Commit 837c569 has been approved by |
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⌛ Testing commit 837c569 with merge 38d1618... |
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💔 Test failed - auto-mac-64-opt |
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The Running check-stage1 locally right now. |
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@bors r+ |
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📌 Commit 875f50a has been approved by |
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⌛ Testing commit 875f50a with merge 84be3ef... |
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💔 Test failed - auto-win-gnu-64-nopt-t |
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@bors: retry On Sat, Jun 20, 2015 at 9:34 AM, David Stygstra notifications@github.com
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When overflow checking on `<<` and `>>` was added for integers, the `<<` and `>>` operations broke for SIMD types (`u32x4`, `i16x8`, etc.). This PR implements checked shifts on SIMD types. Fixes #24258.
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Thanks! |
When overflow checking on
<<and>>was added for integers, the<<and>>operations broke for SIMD types (u32x4,i16x8, etc.). This PR implements checked shifts on SIMD types.Fixes #24258.