Skip to content
New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

Backport fixes to LLVM 4.0 ARM codegen bugs #42740

Merged
merged 1 commit into from
Jun 19, 2017
Merged

Conversation

arielb1
Copy link
Contributor

@arielb1 arielb1 commented Jun 18, 2017

So ARM had quite a few codegen bugs on LLVM 4.0 which are fixed on LLVM
trunk. This backports 5 of them:
r297871 - ARM: avoid clobbering register in v6 jump-table expansion.
  - fixes #42248
r294949 - [Thumb-1] TBB generation: spot redefinitions of index
r295816 - [ARM] Fix constant islands pass.
r300870 - [Thumb-1] Fix corner cases for compressed jump tables
r302650 - [IfConversion] Add missing check in
IfConversion/canFallThroughTo
    - unblocks #39409

r? @alexcrichton
beta-nominating because this fixes regressions introduced by LLVM 4.0.

@arielb1 arielb1 added the beta-nominated Nominated for backporting to the compiler in the beta channel. label Jun 18, 2017
@alexcrichton alexcrichton added the beta-accepted Accepted for backporting to the compiler in the beta channel. label Jun 18, 2017
@alexcrichton
Copy link
Member

@bors: r+

@bors
Copy link
Contributor

bors commented Jun 18, 2017

📌 Commit 6d6ca10 has been approved by alexcrichton

@Mark-Simulacrum
Copy link
Member

@bors r-

Travis failed (unrelated to this PR, but will block this change). cc @aidanhs: It appears that the LLVM tarball solution is broken, stating that the input doesn't look like a tarball. I suspect that maybe it just hasn't been built by GH yet?

@alexcrichton
Copy link
Member

I believe it's just the sha ref not existing, I think it should be rust-lang/llvm@5415ff0

@aidanhs
Copy link
Member

aidanhs commented Jun 18, 2017

Yeah, clicking through to the llvm submodule difference shows github doesn't recognise something about the commits - rust-lang/llvm@ee545e1...12b268e

(I believe the snapshots are generated on the fly and then cached and served out of a CDN for a while, not sure it'd make sense to generate AOT)

So ARM had quite a few codegen bugs on LLVM 4.0 which are fixed on LLVM
trunk. This backports 5 of them:
r297871 - ARM: avoid clobbering register in v6 jump-table expansion.
    - fixes rust-lang#42248
r294949 - [Thumb-1] TBB generation: spot redefinitions of index
r295816 - [ARM] Fix constant islands pass.
r300870 - [Thumb-1] Fix corner cases for compressed jump tables
r302650 - [IfConversion] Add missing check in
IfConversion/canFallThroughTo
    - unblocks rust-lang#39409
@arielb1
Copy link
Contributor Author

arielb1 commented Jun 18, 2017

@bors r=alexcrichton

@bors
Copy link
Contributor

bors commented Jun 18, 2017

📌 Commit 207951b has been approved by alexcrichton

@bors
Copy link
Contributor

bors commented Jun 19, 2017

⌛ Testing commit 207951b with merge 8e26c0e...

bors added a commit that referenced this pull request Jun 19, 2017
Backport fixes to LLVM 4.0 ARM codegen bugs

So ARM had quite a few codegen bugs on LLVM 4.0 which are fixed on LLVM
trunk. This backports 5 of them:
r297871 - ARM: avoid clobbering register in v6 jump-table expansion.
    - fixes #42248
r294949 - [Thumb-1] TBB generation: spot redefinitions of index
r295816 - [ARM] Fix constant islands pass.
r300870 - [Thumb-1] Fix corner cases for compressed jump tables
r302650 - [IfConversion] Add missing check in
IfConversion/canFallThroughTo
    - unblocks #39409

r? @alexcrichton
beta-nominating because this fixes regressions introduced by LLVM 4.0.
@bors
Copy link
Contributor

bors commented Jun 19, 2017

☀️ Test successful - status-appveyor, status-travis
Approved by: alexcrichton
Pushing 8e26c0e to master...

@bors bors merged commit 207951b into rust-lang:master Jun 19, 2017
This was referenced Jun 22, 2017
@alexcrichton alexcrichton removed the beta-nominated Nominated for backporting to the compiler in the beta channel. label Jun 22, 2017
bors added a commit that referenced this pull request Jun 25, 2017
[beta] backports

- #42785
- #42740
- #42735
- #42728
- #42695
- #42659
- #42634
- #42566

I just unilaterally accepted all the non-accepted nominations. Everything picked cleanly.

Still testing locally.

cc @rust-lang/compiler

r? @alexcrichton
bors added a commit that referenced this pull request Jun 25, 2017
[beta] backports

- #42785
- #42740
- #42735
- #42728
- #42695
- #42659
- #42634
- #42566

I just unilaterally accepted all the non-accepted nominations. Everything picked cleanly.

Still testing locally.

cc @rust-lang/compiler

r? @alexcrichton
bors added a commit that referenced this pull request Jun 27, 2017
[beta] backports

Reopening #42841 as a new PR due to bors flakiness.

- #42785
- #42740
- #42735
- #42728
- #42695
- #42659
- #42634
- #42566

I just unilaterally accepted all the non-accepted nominations. Everything picked cleanly.
bors added a commit that referenced this pull request Jun 27, 2017
[beta] backports

Reopening #42841 as a new PR due to bors flakiness.

- #42785
- #42740
- #42735
- #42728
- #42695
- #42659
- #42634
- #42566

I just unilaterally accepted all the non-accepted nominations. Everything picked cleanly.
Sign up for free to join this conversation on GitHub. Already have an account? Sign in to comment
Labels
beta-accepted Accepted for backporting to the compiler in the beta channel.
Projects
None yet
Development

Successfully merging this pull request may close these issues.

Broken match statement when compiling for thumbv6-none-eabi (ARM cortex-m0)
5 participants