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refactor: import inside the x86_64 module
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toku-sa-n committed Dec 17, 2021
1 parent af206af commit 3efa410
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Showing 4 changed files with 9 additions and 10 deletions.
4 changes: 2 additions & 2 deletions src/registers/control.rs
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Expand Up @@ -2,8 +2,6 @@
pub use super::model_specific::{Efer, EferFlags};
use bitflags::bitflags;
#[cfg(feature = "inline_asm")]
use core::arch::asm;

/// Various control flags modifying the basic operation of the CPU.
#[derive(Debug)]
Expand Down Expand Up @@ -163,6 +161,8 @@ bitflags! {
mod x86_64 {
use super::*;
use crate::{instructions::tlb::Pcid, structures::paging::PhysFrame, PhysAddr, VirtAddr};
#[cfg(feature = "inline_asm")]
use core::arch::asm;

impl Cr0 {
/// Read the current set of CR0 flags.
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4 changes: 2 additions & 2 deletions src/registers/model_specific.rs
Original file line number Diff line number Diff line change
Expand Up @@ -4,8 +4,6 @@ use bitflags::bitflags;
// imports for intra doc links
#[cfg(doc)]
use crate::registers::segmentation::{FS, GS};
#[cfg(feature = "inline_asm")]
use core::arch::asm;

/// A model specific register.
#[derive(Debug)]
Expand Down Expand Up @@ -129,6 +127,8 @@ mod x86_64 {
control::Cr4Flags,
segmentation::{Segment, Segment64, CS, SS},
};
#[cfg(feature = "inline_asm")]
use core::arch::asm;

impl Msr {
/// Read 64 bits msr register.
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5 changes: 2 additions & 3 deletions src/registers/rflags.rs
Original file line number Diff line number Diff line change
Expand Up @@ -3,9 +3,6 @@
#[cfg(feature = "instructions")]
pub use self::x86_64::*;

#[cfg(feature = "inline_asm")]
use core::arch::asm;

use bitflags::bitflags;

bitflags! {
Expand Down Expand Up @@ -68,6 +65,8 @@ bitflags! {
#[cfg(feature = "instructions")]
mod x86_64 {
use super::*;
#[cfg(feature = "inline_asm")]
use core::arch::asm;

/// Returns the current value of the RFLAGS register.
///
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6 changes: 3 additions & 3 deletions src/registers/xcontrol.rs
Original file line number Diff line number Diff line change
@@ -1,9 +1,6 @@
//! Access to various extended system registers
use bitflags::bitflags;

#[cfg(feature = "inline_asm")]
use core::arch::asm;

/// Extended feature enable mask register
#[derive(Debug)]
pub struct XCr0;
Expand Down Expand Up @@ -57,6 +54,9 @@ bitflags! {
#[cfg(feature = "instructions")]
mod x86_64 {
use super::*;
#[cfg(feature = "inline_asm")]
use core::arch::asm;

impl XCr0 {
/// Read the current set of XCR0 flags.
#[inline]
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