Test enviroment to connect jigsaw devices w/ Ibex core in CHISEL & compile the design w/ CIRCT IR to analyze the dumped SV
This repo contains CHISEL Wrapper of Ibex connected with Block RAMs from Jigaw by use of Caravan. The SV of this design is dumped with regular FIRRTL and CIRCT firtool to analyze the extent of clean RTL being generated by CIRCT.