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fix for API change. #15

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Dec 21, 2020
Merged

fix for API change. #15

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2 changes: 1 addition & 1 deletion design/craft/inclusivecache/src/MSHR.scala
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Original file line number Diff line number Diff line change
Expand Up @@ -323,7 +323,7 @@ class MSHR(params: InclusiveCacheParameters) extends Module

val p = !params.lastLevel // can be probed
val c = !params.firstLevel // can be acquired
val m = params.inner.client.clients.exists(!_.supportsProbe) // can be written (or read)
val m = params.inner.client.clients.exists(!_.supports.probe) // can be written (or read)
val r = params.outer.manager.managers.exists(!_.alwaysGrantsT) // read-only devices exist
val f = params.control // flush control register exists
val cfg = (p, c, m, r, f)
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8 changes: 4 additions & 4 deletions design/craft/inclusivecache/src/Parameters.scala
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Original file line number Diff line number Diff line change
Expand Up @@ -149,7 +149,7 @@ case class InclusiveCacheParameters(
}

// If we are the first level cache, we do not need to support inner-BCE
val firstLevel = !inner.client.clients.exists(_.supportsProbe)
val firstLevel = !inner.client.clients.exists(_.supports.probe)
// If we are the last level cache, we do not need to support outer-B
val lastLevel = !outer.manager.managers.exists(_.regionType > RegionType.UNCACHED)
require (lastLevel)
Expand All @@ -173,7 +173,7 @@ case class InclusiveCacheParameters(
// println(s"addresses: ${flatAddresses} => ${pickMask} => ${addressBits}")

val allClients = inner.client.clients.size
val clientBitsRaw = inner.client.clients.filter(_.supportsProbe).size
val clientBitsRaw = inner.client.clients.filter(_.supports.probe).size
val clientBits = max(1, clientBitsRaw)
val stateBits = 2

Expand All @@ -195,15 +195,15 @@ case class InclusiveCacheParameters(
if (clientBitsRaw == 0) {
UInt(0)
} else {
Cat(inner.client.clients.filter(_.supportsProbe).map(_.sourceId.contains(source)).reverse)
Cat(inner.client.clients.filter(_.supports.probe).map(_.sourceId.contains(source)).reverse)
}
}

def clientSource(bit: UInt): UInt = {
if (clientBitsRaw == 0) {
UInt(0)
} else {
Mux1H(bit, inner.client.clients.filter(_.supportsProbe).map(c => UInt(c.sourceId.start)))
Mux1H(bit, inner.client.clients.filter(_.supports.probe).map(c => UInt(c.sourceId.start)))
}
}

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