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[mellanox] Update Kernel patches and Kconfig for Linux 6.1.x (#359)
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* Uncomment SDK patches to be properly handled by scriot

Signed-off-by: Vivek Reddy <vkarri@nvidia.com>

* Integrate SDK 4.6.2104 Kernel Patches

 ## Patch List
* 0001-psample-define-the-macro-PSAMPLE_MD_EXTENDED_ATTR.patch :
* 0002-drop_monitor-Extend-WJH-buffer-linux-channel.patch :

* Uncomment hw-mgmt patches for correct processing bythe script

Signed-off-by: Vivek Reddy <vkarri@nvidia.com>

* Intgerate HW-MGMT 7.0030.2008 Changes

 ## Patch List
* 0001-platform-mellanox-Introduce-support-for-rack-manager.patch : torvalds/linux@f8dacbf7da2e
* 0002-platform-mellanox-Change-reset_pwr_converter_fail-at.patch : torvalds/linux@488f0fca0db0
* 0003-platform-mellanox-Cosmetic-changes-rename-to-more-co.patch : torvalds/linux@acc6ea304590
* 0004-platform-mellanox-Introduce-support-for-next-generat.patch : torvalds/linux@fcf3790b9b63
* 0005-platform-mellanox-Introduce-support-of-new-Nvidia-L1.patch : torvalds/linux@dd635e33b5c9
* 0006-platform-mellanox-Split-initialization-procedure.patch : torvalds/linux@0170f616f496
* 0007-platform-mellanox-Split-logic-in-init-and-exit-flow.patch : torvalds/linux@158cd8320776
* 0008-platform-mellanox-Extend-all-systems-with-I2C-notifi.patch : torvalds/linux@233fd7e44cd7
* 0009-platform-mellanox-mlx-platform-Add-mux-selection-reg.patch : torvalds/linux@cefdbc781566
* 0010-platform-mellanox-mlx-platform-Move-bus-shift-assign.patch : torvalds/linux@50b823fdd357
* 0011-platform-mellanox-mlx-platform-Initialize-shift-vari.patch : torvalds/linux@1a0009abfa78
* 0012-platform-mellanox-Fix-order-in-exit-flow.patch :
* 0013-platform-mellanox-mlx-platform-Fix-signals-polarity-.patch :
* 0014-platform-mellanox-mlx-platform-Modify-graceful-shutd.patch :
* 0015-platform-mellanox-Change-register-offset-addresses.patch :
* 0016-platform-mellanox-Add-new-attributes.patch :
* 0017-platform-mellanox-Add-field-upgrade-capability-regis.patch :
* 0018-platform-mellanox-Modify-reset-causes-description.patch :
* 0019-platform-mellanox-mlx-platform-Modify-health-and-pow.patch :
* 0020-platform-mellanox-mlx-platform-Add-reset-cause-attri.patch :
* 0021-platform-mellanox-mlx-platform-add-support-for-addit.patch :
* 0022-platform-mellanox-mlx-platform-Modify-power-off-call.patch :
* 0023-platform-mellanox-Cosmetic-changes.patch :
* 0024-platform-mellanox-mlx-platform-Add-reset-callback.patch :
* 0025-platform-mellanox-mlx-platform-Prepare-driver-to-all.patch :
* 0026-platform-mellanox-mlx-platform-Introduce-ACPI-init-f.patch :
* 0027-platform-mellanox-mlx-platform-Get-interrupt-line-th.patch :
* 0028-platform-mellanox-Add-initial-support-for-PCIe-based.patch :
* 0029-platform-mellanox-mlxreg-hotplug-Extend-condition-fo.patch :
* 0030-platform-mellanox-nvsw-sn2201-change-fans-i2c-busses.patch :
* 0032-platform_data-mlxreg-Add-field-with-mapped-resource-.patch : torvalds/linux@26917eab144c
* 0033-i2c-mlxcpld-Allow-driver-to-run-on-ARM64-architectur.patch :
* 0034-i2c-mlxcpld-Add-support-for-extended-transaction-len.patch :
* 0035-i2c-mlxcpld-Support-PCIe-mapped-register-space.patch :
* 0036-mlxsw-i2c-Fix-chunk-size-setting-in-output-mailbox-b.patch :
* 0037-mlxsw-i2c-Limit-single-transaction-buffer-size.patch :
* 0038-mlxsw-core_hwmon-Adjust-module-label-names-based-on-.patch :
* 0039-mlxsw-reg-Limit-MTBR-register-payload-to-a-single-da.patch :
* 0040-mlxsw-core-Extend-allowed-list-of-external-cooling-d.patch :
* 0041-mlxsw-i2c-Utilize-standard-macros-for-dividing-buffe.patch :
* 0043-hwmon-mlxreg-fan-Extend-number-of-supporetd-fans.patch :
* 0051-platform-mellanox-mlxreg-hotplug-Allow-more-flexible.patch : torvalds/linux@26e118ea98cf
* 0052-i2c-mux-Add-register-map-based-mux-driver.patch :
* 0056-Documentation-ABI-Add-new-attribute-for-mlxreg-io-sy.patch : torvalds/linux@e7210563432a
* 0057-Documentation-ABI-Add-new-attribute-for-mlxreg-io-sy.patch : torvalds/linux@e7210563432a
* 0061-pinctrl-Introduce-struct-pinfunction-and-PINCTRL_PIN.patch : torvalds/linux@443a0a0f0cf
* 0062-pinctrl-mlxbf3-Add-pinctrl-driver-support.patch : torvalds/linux@d11f932808dc
* 0063-gpio-mlxbf3-Add-gpio-driver-support.patch : torvalds/linux@cd33f216d241
* 0064-pinctrl-mlxbf3-set-varaiable-mlxbf3_pmx_funcs-storag.patch : torvalds/linux@743d3336029f
* 0085-hwmon-mlxreg-fan-Separate-methods-of-fan-setting-com.patch :
* 8003-mlxsw-i2c-SONIC-ISSU-Prevent-transaction-execution-f.patch :
* 8005-leds-leds-mlxreg-Downstream-Send-udev-event-from-led.patch :
* 8006-i2c-mlxcpld-Downstream-WA-to-avoid-error-for-SMBUS-r.patch :
* 8007-hwmon-mlxreg-fan-Downstream-Allow-fan-speed-setting-.patch :
* 8008-hwmon-emc2305-Downstream-Allow-fan-speed-setting-gra.patch :
* 8009-hwmon-mlxsw-Downstream-Allow-fan-speed-setting-granu.patch :

* Dont put config under arm64 and common markers

* Remove the pending mellanox-arm64 kconfig

Signed-off-by: Vivek Reddy <vkarri@nvidia.com>

---------

Signed-off-by: Vivek Reddy <vkarri@nvidia.com>
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@vivekrnv @yxieca
vivekrnv authored and yxieca committed Nov 20, 2023
1 parent ba37b4d commit b2601c7
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Showing 161 changed files with 5,644 additions and 19,681 deletions.
58 changes: 0 additions & 58 deletions patch/0001-i2c-mlxcpld-Update-module-license.patch
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This file was deleted.

53 changes: 29 additions & 24 deletions ...-Introduce-support-for-rack-manager.patch → ...-Introduce-support-for-rack-manager.patch
View file
Original file line number Diff line number Diff line change
@@ -1,7 +1,7 @@
From 3ddb1633cbd4c914ac58b64247d5724ab7f2d6c3 Mon Sep 17 00:00:00 2001
From e81bfa677c49da39ae72d58d96c997dbf2e085b3 Mon Sep 17 00:00:00 2001
From: Vadim Pasternak <vadimp@nvidia.com>
Date: Mon, 14 Feb 2022 13:24:44 +0200
Subject: [PATCH backport 5.10 163/182] platform: mellanox: Introduce support
Date: Wed, 8 Feb 2023 08:33:18 +0200
Subject: [PATCH backport 6.1.42 01/85] platform: mellanox: Introduce support
for rack manager switch

The rack switch is designed to provide high bandwidth, low latency
Expand All @@ -16,12 +16,15 @@ System equipped with:
ASICs firmware.

Signed-off-by: Vadim Pasternak <vadimp@nvidia.com>
Reviewed-by: Michael Shych <michaelsh@nvidia.com>
Link: https://lore.kernel.org/r/20230208063331.15560-2-vadimp@nvidia.com
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
---
drivers/platform/x86/mlx-platform.c | 259 ++++++++++++++++++++++++++++
1 file changed, 259 insertions(+)
drivers/platform/x86/mlx-platform.c | 261 ++++++++++++++++++++++++++++
1 file changed, 261 insertions(+)

diff --git a/drivers/platform/x86/mlx-platform.c b/drivers/platform/x86/mlx-platform.c
index 1d0c13c653b3..3ad85934d6e3 100644
index 2fac05a17a5c..3e4adeb20a7e 100644
--- a/drivers/platform/x86/mlx-platform.c
+++ b/drivers/platform/x86/mlx-platform.c
@@ -90,6 +90,12 @@
Expand All @@ -46,23 +49,23 @@ index 1d0c13c653b3..3ad85934d6e3 100644
#define MLXPLAT_CPLD_LPC_REG_WD_CLEAR_OFFSET 0xc7
#define MLXPLAT_CPLD_LPC_REG_WD_CLEAR_WP_OFFSET 0xc8
#define MLXPLAT_CPLD_LPC_REG_WD1_TMR_OFFSET 0xc9
@@ -215,6 +223,7 @@
@@ -214,6 +222,7 @@
#define MLXPLAT_CPLD_LED_HI_NIBBLE_MASK GENMASK(3, 0)
#define MLXPLAT_CPLD_VOLTREG_UPD_MASK GENMASK(5, 4)
#define MLXPLAT_CPLD_GWP_MASK GENMASK(0, 0)
+#define MLXPLAT_CPLD_EROT_MASK GENMASK(1, 0)
#define MLXPLAT_CPLD_I2C_CAP_BIT 0x04
#define MLXPLAT_CPLD_I2C_CAP_MASK GENMASK(5, MLXPLAT_CPLD_I2C_CAP_BIT)

@@ -244,6 +253,7 @@
@@ -243,6 +252,7 @@
#define MLXPLAT_CPLD_CH2_ETH_MODULAR 3
#define MLXPLAT_CPLD_CH3_ETH_MODULAR 43
#define MLXPLAT_CPLD_CH4_ETH_MODULAR 51
+#define MLXPLAT_CPLD_CH2_RACK_SWITCH 18

/* Number of LPC attached MUX platform devices */
#define MLXPLAT_CPLD_LPC_MUX_DEVS 4
@@ -281,6 +291,9 @@
@@ -280,6 +290,9 @@
/* Minimum power required for turning on Ethernet modular system (WATT) */
#define MLXPLAT_CPLD_ETH_MODULAR_PWR_MIN 50

Expand All @@ -72,7 +75,7 @@ index 1d0c13c653b3..3ad85934d6e3 100644
/* mlxplat_priv - platform private data
* @pdev_i2c - i2c controller platform device
* @pdev_mux - array of mux platform devices
@@ -461,6 +474,36 @@ static struct i2c_mux_reg_platform_data mlxplat_modular_mux_data[] = {
@@ -460,6 +473,36 @@ static struct i2c_mux_reg_platform_data mlxplat_modular_mux_data[] = {
},
};

Expand Down Expand Up @@ -109,7 +112,7 @@ index 1d0c13c653b3..3ad85934d6e3 100644
/* Platform hotplug devices */
static struct i2c_board_info mlxplat_mlxcpld_pwr[] = {
{
@@ -2165,6 +2208,97 @@ struct mlxreg_core_hotplug_platform_data mlxplat_mlxcpld_chassis_blade_data = {
@@ -2064,6 +2107,97 @@ struct mlxreg_core_hotplug_platform_data mlxplat_mlxcpld_nvlink_blade_data = {
.mask_low = MLXPLAT_CPLD_LOW_AGGR_MASK_LOW,
};

Expand Down Expand Up @@ -207,9 +210,9 @@ index 1d0c13c653b3..3ad85934d6e3 100644
/* Platform led default data */
static struct mlxreg_core_data mlxplat_mlxcpld_default_led_data[] = {
{
@@ -3166,6 +3300,42 @@ static struct mlxreg_core_data mlxplat_mlxcpld_default_ng_regs_io_data[] = {
@@ -2947,6 +3081,44 @@ static struct mlxreg_core_data mlxplat_mlxcpld_default_ng_regs_io_data[] = {
.mask = GENMASK(7, 0) & ~BIT(2),
.mode = 0444,
.mode = 0200,
},
+ {
+ .label = "erot1_reset",
Expand Down Expand Up @@ -240,17 +243,19 @@ index 1d0c13c653b3..3ad85934d6e3 100644
+ .reg = MLXPLAT_CPLD_LPC_REG_PWM_CONTROL_OFFSET,
+ .mask = GENMASK(7, 0) & ~BIT(4),
+ .mode = 0644,
+ .secured = 1,
+ },
+ {
+ .label = "erot2_wp",
+ .reg = MLXPLAT_CPLD_LPC_REG_PWM_CONTROL_OFFSET,
+ .mask = GENMASK(7, 0) & ~BIT(5),
+ .mode = 0644,
+ .secured = 1,
+ },
{
.label = "reset_long_pb",
.reg = MLXPLAT_CPLD_LPC_REG_RESET_CAUSE_OFFSET,
@@ -3361,6 +3531,25 @@ static struct mlxreg_core_data mlxplat_mlxcpld_default_ng_regs_io_data[] = {
@@ -3142,6 +3314,25 @@ static struct mlxreg_core_data mlxplat_mlxcpld_default_ng_regs_io_data[] = {
.mask = GENMASK(7, 0) & ~BIT(4),
.mode = 0644,
},
Expand All @@ -276,7 +281,7 @@ index 1d0c13c653b3..3ad85934d6e3 100644
{
.label = "config1",
.reg = MLXPLAT_CPLD_LPC_REG_CONFIG1_OFFSET,
@@ -4577,6 +4766,10 @@ static bool mlxplat_mlxcpld_writeable_reg(struct device *dev, unsigned int reg)
@@ -4257,6 +4448,10 @@ static bool mlxplat_mlxcpld_writeable_reg(struct device *dev, unsigned int reg)
case MLXPLAT_CPLD_LPC_REG_PWR_MASK_OFFSET:
case MLXPLAT_CPLD_LPC_REG_FAN_EVENT_OFFSET:
case MLXPLAT_CPLD_LPC_REG_FAN_MASK_OFFSET:
Expand All @@ -287,15 +292,15 @@ index 1d0c13c653b3..3ad85934d6e3 100644
case MLXPLAT_CPLD_LPC_REG_AGGRLC_MASK_OFFSET:
case MLXPLAT_CPLD_LPC_REG_LC_IN_EVENT_OFFSET:
case MLXPLAT_CPLD_LPC_REG_LC_IN_MASK_OFFSET:
@@ -4594,6 +4787,7 @@ static bool mlxplat_mlxcpld_writeable_reg(struct device *dev, unsigned int reg)
@@ -4274,6 +4469,7 @@ static bool mlxplat_mlxcpld_writeable_reg(struct device *dev, unsigned int reg)
case MLXPLAT_CPLD_LPC_REG_LC_SD_EVENT_OFFSET:
case MLXPLAT_CPLD_LPC_REG_LC_SD_MASK_OFFSET:
case MLXPLAT_CPLD_LPC_REG_LC_PWR_ON:
+ case MLXPLAT_CPLD_LPC_REG_SPI_CHNL_SELECT:
case MLXPLAT_CPLD_LPC_REG_WD_CLEAR_OFFSET:
case MLXPLAT_CPLD_LPC_REG_WD_CLEAR_WP_OFFSET:
case MLXPLAT_CPLD_LPC_REG_WD1_TMR_OFFSET:
@@ -4678,6 +4872,12 @@ static bool mlxplat_mlxcpld_readable_reg(struct device *dev, unsigned int reg)
@@ -4358,6 +4554,12 @@ static bool mlxplat_mlxcpld_readable_reg(struct device *dev, unsigned int reg)
case MLXPLAT_CPLD_LPC_REG_FAN_OFFSET:
case MLXPLAT_CPLD_LPC_REG_FAN_EVENT_OFFSET:
case MLXPLAT_CPLD_LPC_REG_FAN_MASK_OFFSET:
Expand All @@ -308,7 +313,7 @@ index 1d0c13c653b3..3ad85934d6e3 100644
case MLXPLAT_CPLD_LPC_REG_AGGRLC_OFFSET:
case MLXPLAT_CPLD_LPC_REG_AGGRLC_MASK_OFFSET:
case MLXPLAT_CPLD_LPC_REG_LC_IN_OFFSET:
@@ -4702,6 +4902,8 @@ static bool mlxplat_mlxcpld_readable_reg(struct device *dev, unsigned int reg)
@@ -4382,6 +4584,8 @@ static bool mlxplat_mlxcpld_readable_reg(struct device *dev, unsigned int reg)
case MLXPLAT_CPLD_LPC_REG_LC_SD_EVENT_OFFSET:
case MLXPLAT_CPLD_LPC_REG_LC_SD_MASK_OFFSET:
case MLXPLAT_CPLD_LPC_REG_LC_PWR_ON:
Expand All @@ -317,7 +322,7 @@ index 1d0c13c653b3..3ad85934d6e3 100644
case MLXPLAT_CPLD_LPC_REG_WD_CLEAR_OFFSET:
case MLXPLAT_CPLD_LPC_REG_WD_CLEAR_WP_OFFSET:
case MLXPLAT_CPLD_LPC_REG_WD1_TMR_OFFSET:
@@ -4812,6 +5014,12 @@ static bool mlxplat_mlxcpld_volatile_reg(struct device *dev, unsigned int reg)
@@ -4492,6 +4696,12 @@ static bool mlxplat_mlxcpld_volatile_reg(struct device *dev, unsigned int reg)
case MLXPLAT_CPLD_LPC_REG_FAN_OFFSET:
case MLXPLAT_CPLD_LPC_REG_FAN_EVENT_OFFSET:
case MLXPLAT_CPLD_LPC_REG_FAN_MASK_OFFSET:
Expand All @@ -330,7 +335,7 @@ index 1d0c13c653b3..3ad85934d6e3 100644
case MLXPLAT_CPLD_LPC_REG_AGGRLC_OFFSET:
case MLXPLAT_CPLD_LPC_REG_AGGRLC_MASK_OFFSET:
case MLXPLAT_CPLD_LPC_REG_LC_IN_OFFSET:
@@ -4836,6 +5044,8 @@ static bool mlxplat_mlxcpld_volatile_reg(struct device *dev, unsigned int reg)
@@ -4516,6 +4726,8 @@ static bool mlxplat_mlxcpld_volatile_reg(struct device *dev, unsigned int reg)
case MLXPLAT_CPLD_LPC_REG_LC_SD_EVENT_OFFSET:
case MLXPLAT_CPLD_LPC_REG_LC_SD_MASK_OFFSET:
case MLXPLAT_CPLD_LPC_REG_LC_PWR_ON:
Expand All @@ -339,7 +344,7 @@ index 1d0c13c653b3..3ad85934d6e3 100644
case MLXPLAT_CPLD_LPC_REG_WD2_TMR_OFFSET:
case MLXPLAT_CPLD_LPC_REG_WD2_TLEFT_OFFSET:
case MLXPLAT_CPLD_LPC_REG_WD3_TMR_OFFSET:
@@ -4903,6 +5113,13 @@ static const struct reg_default mlxplat_mlxcpld_regmap_ng400[] = {
@@ -4583,6 +4795,13 @@ static const struct reg_default mlxplat_mlxcpld_regmap_ng400[] = {
{ MLXPLAT_CPLD_LPC_REG_WD3_ACT_OFFSET, 0x00 },
};

Expand All @@ -353,7 +358,7 @@ index 1d0c13c653b3..3ad85934d6e3 100644
static const struct reg_default mlxplat_mlxcpld_regmap_eth_modular[] = {
{ MLXPLAT_CPLD_LPC_REG_GP2_OFFSET, 0x61 },
{ MLXPLAT_CPLD_LPC_REG_PWM_CONTROL_OFFSET, 0x00 },
@@ -4996,6 +5213,20 @@ static const struct regmap_config mlxplat_mlxcpld_regmap_config_ng400 = {
@@ -4676,6 +4895,20 @@ static const struct regmap_config mlxplat_mlxcpld_regmap_config_ng400 = {
.reg_write = mlxplat_mlxcpld_reg_write,
};

Expand All @@ -374,7 +379,7 @@ index 1d0c13c653b3..3ad85934d6e3 100644
static const struct regmap_config mlxplat_mlxcpld_regmap_config_eth_modular = {
.reg_bits = 8,
.val_bits = 8,
@@ -5303,6 +5534,27 @@ static int __init mlxplat_dmi_qmb8700_matched(const struct dmi_system_id *dmi)
@@ -4957,6 +5190,27 @@ static int __init mlxplat_dmi_nvlink_blade_matched(const struct dmi_system_id *d
return 1;
}

Expand Down Expand Up @@ -402,7 +407,7 @@ index 1d0c13c653b3..3ad85934d6e3 100644
static const struct dmi_system_id mlxplat_dmi_table[] __initconst = {
{
.callback = mlxplat_dmi_default_wc_matched,
@@ -5367,6 +5619,13 @@ static const struct dmi_system_id mlxplat_dmi_table[] __initconst = {
@@ -5014,6 +5268,13 @@ static const struct dmi_system_id mlxplat_dmi_table[] __initconst = {
DMI_MATCH(DMI_BOARD_NAME, "VMOD0009"),
},
},
Expand Down
2 changes: 1 addition & 1 deletion ...-the-macro-PSAMPLE_MD_EXTENDED_ATTR.patch → ...-the-macro-PSAMPLE_MD_EXTENDED_ATTR.patch
View file
Original file line number Diff line number Diff line change
Expand Up @@ -12,7 +12,7 @@ Signed-off-by: Vadym Hlushko <vadymh@nvidia.com>
1 file changed, 2 insertions(+)

diff --git a/include/net/psample.h b/include/net/psample.h
index e328c51..1c4d70c 100644
index 0509d2d..c66e325 100644
--- a/include/net/psample.h
+++ b/include/net/psample.h
@@ -14,6 +14,8 @@ struct psample_group {
Expand Down
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