[Dell]Poller to detecte Intel Rangely C2000 LPC degradation #3065
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retest vs please |
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can you resolve conflict? |
Adding execute permissions Changing service permission Addressing review comment chaning s6100 permission Added more info in log
Done |
lguohan
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Jun 24, 2019
yxieca
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Jan 6, 2020
…s6100 (#3065) - What I did Added Daemon to Log LPC bus degradation in Intel C2000 processor. Intel Rangeley C2000 processors with revision less than or equal to 2 have issue where LPC bus degrades over time in some processors. To identify the problem and to notify the issue, a daemon has been added which will log on encountering the issue. - How I did it Added a daemon which validates the CPLD scratch(0x102) and SMF scratch(0x202) registers by writing and reading values on regular polling intervals (300 seconds). If there is a discrepancy between read and write, a critical log will be thrown. - How to verify it The infra is verify by simulating the issue where between write and read, the value in register is modified and the log appearance is checked. - Description for the changelog Added Daemon to identify LPC bus degradation issue and notify using syslog in Dell S6100 and Z9100 platforms. This daemon will only run on processors with revision less than or equal to 2.
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Do you know the lifetime for this CPLD device? Flash and CPLD normally have lifetime of writes on 10k range, in case of flash controller writes can be increased to millions. Is writing to CPLD registers every 300 seconds a good option? |
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- What I did
Added Daemon to Log LPC bus degradation in Intel C2000 processor. Intel Rangeley C2000 processors with revision less than or equal to 2 have issue where LPC bus degrades over time in some processors. To identify the problem and to notify the issue, a daemon has been added which will log on encountering the issue.
- How I did it
Added a daemon which validates the CPLD scratch(0x102) and SMF scratch(0x202) registers by writing and reading values on regular polling intervals (300 seconds). If there is a discrepancy between read and write, a critical log will be thrown.
- How to verify it
The infra is verify by simulating the issue where between write and read, the value in register is modified and the log appearance is checked.
- Description for the changelog
Added Daemon to identify LPC bus degradation issue and notify using syslog in Dell S6100 and Z9100 platforms. This daemon will only run on processors with revision less than or equal to 2.
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