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Add base argument and tx_fir_pre3/post3
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byu343 committed Aug 8, 2022
1 parent 20318cf commit ad1d17b
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Showing 4 changed files with 9 additions and 23 deletions.
2 changes: 1 addition & 1 deletion orchagent/p4orch/tests/fake_portorch.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -623,7 +623,7 @@ void PortsOrch::updateDbPortOperSpeed(Port &port, sai_uint32_t speed)
{
}

void PortsOrch::getPortSerdesVal(const std::string &s, std::vector<uint32_t> &lane_values)
void PortsOrch::getPortSerdesVal(const std::string &s, std::vector<uint32_t> &lane_values, int base)
{
}

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25 changes: 5 additions & 20 deletions orchagent/portsorch.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -6633,7 +6633,8 @@ void PortsOrch::removePortSerdesAttribute(sai_object_id_t port_id)
}

void PortsOrch::getPortSerdesVal(const std::string& val_str,
std::vector<uint32_t> &lane_values)
std::vector<uint32_t> &lane_values,
int base)
{
SWSS_LOG_ENTER();

Expand All @@ -6643,23 +6644,7 @@ void PortsOrch::getPortSerdesVal(const std::string& val_str,

while (std::getline(iss, lane_str, ','))
{
lane_val = (uint32_t)std::stoul(lane_str, NULL, 16);
lane_values.push_back(lane_val);
}
}

void PortsOrch::getPortSerdesValBase10(const std::string& val_str,
std::vector<uint32_t> &lane_values)
{
SWSS_LOG_ENTER();

uint32_t lane_val;
std::string lane_str;
std::istringstream iss(val_str);

while (std::getline(iss, lane_str, ','))
{
lane_val = (uint32_t)std::stoul(lane_str, NULL, 10);
lane_val = (uint32_t)std::stoul(lane_str, NULL, base);
lane_values.push_back(lane_val);
}
}
Expand Down Expand Up @@ -7041,7 +7026,7 @@ bool PortsOrch::initGearboxPort(Port &port)
for (auto pair: tx_fir_strings_system_side) {
if (m_gearboxInterfaceMap[port.m_index].tx_firs.find(pair.first) != m_gearboxInterfaceMap[port.m_index].tx_firs.end() ) {
attr_val.clear();
getPortSerdesValBase10(m_gearboxInterfaceMap[port.m_index].tx_firs[pair.first], attr_val);
getPortSerdesVal(m_gearboxInterfaceMap[port.m_index].tx_firs[pair.first], attr_val, 10);
serdes_attr.insert(serdes_attr_pair(pair.second, attr_val));
}
}
Expand All @@ -7061,7 +7046,7 @@ bool PortsOrch::initGearboxPort(Port &port)
for (auto pair: tx_fir_strings_line_side) {
if (m_gearboxInterfaceMap[port.m_index].tx_firs.find(pair.first) != m_gearboxInterfaceMap[port.m_index].tx_firs.end() ) {
attr_val.clear();
getPortSerdesValBase10(m_gearboxInterfaceMap[port.m_index].tx_firs[pair.first], attr_val);
getPortSerdesVal(m_gearboxInterfaceMap[port.m_index].tx_firs[pair.first], attr_val, 10);
serdes_attr.insert(serdes_attr_pair(pair.second, attr_val));
}
}
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3 changes: 1 addition & 2 deletions orchagent/portsorch.h
Original file line number Diff line number Diff line change
Expand Up @@ -395,8 +395,7 @@ class PortsOrch : public Orch, public Subject
void refreshPortStateAutoNeg(const Port &port);
void refreshPortStateLinkTraining(const Port &port);

void getPortSerdesVal(const std::string& s, std::vector<uint32_t> &lane_values);
void getPortSerdesValBase10(const std::string& s, std::vector<uint32_t> &lane_values);
void getPortSerdesVal(const std::string& s, std::vector<uint32_t> &lane_values, int base = 16);
bool getPortAdvSpeedsVal(const std::string &s, std::vector<uint32_t> &speed_values);
bool getPortInterfaceTypeVal(const std::string &s, sai_port_interface_type_t &interface_type);
bool getPortAdvInterfaceTypesVal(const std::string &s, std::vector<uint32_t> &type_values);
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2 changes: 2 additions & 0 deletions tests/test_gearbox.py
Original file line number Diff line number Diff line change
Expand Up @@ -104,8 +104,10 @@ def __init__(self, db_id: int, connector: str, gearbox: Gearbox):
("SAI_PORT_SERDES_ATTR_TX_FIR_MAIN", "tx_fir_main"),
("SAI_PORT_SERDES_ATTR_TX_FIR_PRE1", "tx_fir_pre1"),
("SAI_PORT_SERDES_ATTR_TX_FIR_PRE2", "tx_fir_pre2"),
("SAI_PORT_SERDES_ATTR_TX_FIR_PRE3", "tx_fir_pre3"),
("SAI_PORT_SERDES_ATTR_TX_FIR_POST1", "tx_fir_post1"),
("SAI_PORT_SERDES_ATTR_TX_FIR_POST2", "tx_fir_post2"),
("SAI_PORT_SERDES_ATTR_TX_FIR_POST3", "tx_fir_post3"),
]:
if asic_db_key not in fvs:
continue
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