Add memory collection related API #85
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This commit adds an API to retrieve the SEM Error Correction Count provided by the FPGA System Monitor IP core. Signed-off-by: Takuya Sasaki <takuya.sasaki@spacecubics.com>
This commit adds the control register address of HRMEM to the MAIN and ADCS board's DTS. This is required for feature additions such as HRMEM's memory collection. Signed-off-by: Takuya Sasaki <takuya.sasaki@spacecubics.com>
This commit adds an API to enable or disable ECC Error Collect. When this feature is enabled, the HRMEM IP core performs a write-back of the corrected data to repair the memory upon detection of a 1-bit ECC error. This feature is enabled by default in the HRMEM IP core. Signed-off-by: Takuya Sasaki <takuya.sasaki@spacecubics.com>
This commit adds an API to enable or disable memory scrub. When this feature is enabled, the HRMEM IP core performs periodic reads of all fields in the SRAM to check the written data.This feature is enabled by default in the HRMEM IP core. The HRMEM IP core also allows configuration of settings such as the read cycle and behavior when the FIFO for error correction data becomes full. However, this API only controls the enable/disable functionality, keeping the default settings unchanged. Signed-off-by: Takuya Sasaki <takuya.sasaki@spacecubics.com>
This commit adds an API to retrieve the 1-bit ECC error count. The 1-bit ECC error count can be retrieved separately for counters detected by read from memory scrub or AHB/AXI bus. Signed-off-by: Takuya Sasaki <takuya.sasaki@spacecubics.com>
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This PR adds APIs related to memory correction. Along with adding an API for error count retrieval, it also introduces an API to enable or disable memory scrubbing, which is enabled by default in the FPGA IP core.