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SST Master Branch Merger: Auto Create Pull Request to Promote from devel to master - All Tests Ran Clean #2206

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merged 3 commits into from
Aug 19, 2023
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SST Master Branch Merger: Auto Create Pull Request to Promote from devel to master - All Tests Ran Clean #2206

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d0ad96d
add node ID to debug
mjleven Aug 16, 2023
e23bdbe
decode more instructions
mjleven Aug 16, 2023
4887397
Merge Pull Request #2203 from mjleven/sst-elements/VanadisAug16
sst-autotester Aug 17, 2023
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61 changes: 53 additions & 8 deletions src/sst/elements/vanadis/decoder/vriscv64decoder.h
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Original file line number Diff line number Diff line change
Expand Up @@ -1624,6 +1624,23 @@ class VanadisRISCV64Decoder : public VanadisDecoder
ins_address, hw_thr, options, fpflags, rd, rs1, rs2));
decode_fault = false;
} break;
case 32:
{
processR(ins, op_code, rd, rs1, rs2, func_code3, func_code7);

output->verbose( CALL_INFO, 16, 0, "---> func_code3=%" PRIu32 " / func_code7=%" PRIu32 "\n", func_code3, func_code7);

switch ( rs2 ) {
case 1:
{
// double to float
output->verbose(CALL_INFO, 16, 0, "-----> FCVT.S.D %" PRIu16 " <- %" PRIu16 "\n", rs1, rd);
bundle->addInstruction(
new VanadisFPConvertInstruction<double,float>(ins_address, hw_thr, options, fpflags, rd, rs1));
decode_fault = false;
} break;
}
} break;
case 33:
{
processR(ins, op_code, rd, rs1, rs2, func_code3, func_code7);
Expand All @@ -1643,14 +1660,6 @@ class VanadisRISCV64Decoder : public VanadisDecoder
new VanadisFPConvertInstruction<float, double>(ins_address, hw_thr, options, fpflags, rd, rs1));
decode_fault = false;
} break;
case 1:
{
// double to float
output->verbose(CALL_INFO, 16, 0, "-----> FCVT.S.D %" PRIu16 " <- %" PRIu16 "\n", rs1, rd);
bundle->addInstruction(
new VanadisFPConvertInstruction<double, float>(ins_address, hw_thr, options, fpflags, rd, rs1));
decode_fault = false;
} break;
}

} break;
Expand Down Expand Up @@ -1680,6 +1689,33 @@ class VanadisRISCV64Decoder : public VanadisDecoder
new VanadisGPR2FPInstruction<uint32_t, float>(ins_address, hw_thr, options, fpflags, rd, rs1));
decode_fault = false;
} break;
case 3:
{
// uint64 to float
output->verbose(CALL_INFO, 16, 0, "-----> FCVT.S.LU %" PRIu16 " <- %" PRIu16 "\n", rs1, rd);
bundle->addInstruction(
new VanadisGPR2FPInstruction<uint64_t, float>(ins_address, hw_thr, options, fpflags, rd, rs1));
decode_fault = false;
} break;
}
} break;
case 96:
{
processR(ins, op_code, rd, rs1, rs2, func_code3, func_code7);
output->verbose(
CALL_INFO, 16, 0, "---> func_code3=%" PRIu32 " / func_code7=%" PRIu32 "\n", func_code3,
func_code7);

// rs2 dictates the signed nature of the operands
switch ( rs2 ) {
case 0:
{
// float to int32
output->verbose(CALL_INFO, 16, 0, "-----> FCVT.W.S %" PRIu16 " <- %" PRIu16 "\n", rs1, rd);
bundle->addInstruction(
new VanadisFP2GPRInstruction<float, int32_t>(ins_address, hw_thr, options, fpflags, rd, rs1));
decode_fault = false;
} break;
}
} break;
case 97:
Expand Down Expand Up @@ -1836,6 +1872,15 @@ class VanadisRISCV64Decoder : public VanadisDecoder
ins_address, hw_thr, options, fpflags, rd, rs1, rs2));
decode_fault = false;
} break;
case 0x2:
{
// FEQ.S
output->verbose(
CALL_INFO, 16, 0, "-----> FEQ.S %" PRIu16 " <- %" PRIu16 " < %" PRIu16 "\n", rd, rs1, rs2);
bundle->addInstruction(new VanadisFPSetRegCompareInstruction<REG_COMPARE_EQ, float>(
ins_address, hw_thr, options, fpflags, rd, rs1, rs2));
decode_fault = false;
} break;
}
} break;
case 0x51:
Expand Down
8 changes: 7 additions & 1 deletion src/sst/elements/vanadis/os/vnodeos.cc
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Original file line number Diff line number Diff line change
Expand Up @@ -37,7 +37,13 @@ VanadisNodeOSComponent::VanadisNodeOSComponent(SST::ComponentId_t id, SST::Param

const uint32_t verbosity = params.find<uint32_t>("dbgLevel", 0);
const uint32_t mask = params.find<uint32_t>("dbgMask", 0);
output = new SST::Output("[node-os]:@p():@l ", verbosity, mask, SST::Output::STDOUT);
auto node = params.find<uint32_t>("nodeId", 0);

char* outputPrefix = (char*)malloc(sizeof(char) * 256);
snprintf(outputPrefix, sizeof(char)*256, "[node%d-os]:@p():@l ", node);

output = new SST::Output(outputPrefix, verbosity, mask, Output::STDOUT);
free(outputPrefix);

const uint32_t core_count = params.find<uint32_t>("cores", 0);
const uint32_t hardwareThreadCount = params.find<uint32_t>("hardwareThreadCount", 1);
Expand Down