Skip to content

Commit

Permalink
Dep: Update vixl to 662828c
Browse files Browse the repository at this point in the history
  • Loading branch information
stenzek committed Jun 14, 2024
1 parent d45e218 commit f0c2832
Show file tree
Hide file tree
Showing 66 changed files with 69,296 additions and 14,188 deletions.
10 changes: 7 additions & 3 deletions dep/vixl/CMakeLists.txt
Original file line number Diff line number Diff line change
Expand Up @@ -59,26 +59,30 @@ if(CPU_ARCH_ARM64)
include/vixl/aarch64/constants-aarch64.h
include/vixl/aarch64/cpu-aarch64.h
include/vixl/aarch64/cpu-features-auditor-aarch64.h
include/vixl/aarch64/debugger-aarch64.h
include/vixl/aarch64/decoder-aarch64.h
include/vixl/aarch64/decoder-constants-aarch64.h
include/vixl/aarch64/decoder-visitor-map-aarch64.h
include/vixl/aarch64/disasm-aarch64.h
include/vixl/aarch64/instructions-aarch64.h
include/vixl/aarch64/instrument-aarch64.h
include/vixl/aarch64/macro-assembler-aarch64.h
include/vixl/aarch64/operands-aarch64.h
include/vixl/aarch64/registers-aarch64.h
include/vixl/aarch64/simulator-aarch64.h
include/vixl/aarch64/simulator-constants-aarch64.h
src/aarch64/assembler-aarch64.cc
src/aarch64/assembler-sve-aarch64.cc
src/aarch64/cpu-aarch64.cc
src/aarch64/cpu-features-auditor-aarch64.cc
src/aarch64/decoder-aarch64.cc
src/aarch64/disasm-aarch64.cc
src/aarch64/instructions-aarch64.cc
src/aarch64/instrument-aarch64.cc
src/aarch64/logic-aarch64.cc
src/aarch64/macro-assembler-aarch64.cc
src/aarch64/macro-assembler-sve-aarch64.cc
src/aarch64/operands-aarch64.cc
src/aarch64/pointer-auth-aarch64.cc
src/aarch64/simulator-aarch64.cc
src/aarch64/registers-aarch64.cc
)
target_include_directories(vixl PRIVATE
${CMAKE_CURRENT_SOURCE_DIR}/include/vixl/aarch64
Expand Down
6 changes: 3 additions & 3 deletions dep/vixl/include/vixl/aarch32/assembler-aarch32.h
Original file line number Diff line number Diff line change
Expand Up @@ -27,10 +27,10 @@
#ifndef VIXL_AARCH32_ASSEMBLER_AARCH32_H_
#define VIXL_AARCH32_ASSEMBLER_AARCH32_H_

#include "../assembler-base-vixl.h"
#include "assembler-base-vixl.h"

#include "instructions-aarch32.h"
#include "location-aarch32.h"
#include "aarch32/instructions-aarch32.h"
#include "aarch32/location-aarch32.h"

namespace vixl {
namespace aarch32 {
Expand Down
2 changes: 1 addition & 1 deletion dep/vixl/include/vixl/aarch32/constants-aarch32.h
Original file line number Diff line number Diff line change
Expand Up @@ -32,7 +32,7 @@ extern "C" {
#include <stdint.h>
}

#include "../globals-vixl.h"
#include "globals-vixl.h"


namespace vixl {
Expand Down
10 changes: 8 additions & 2 deletions dep/vixl/include/vixl/aarch32/disasm-aarch32.h
Original file line number Diff line number Diff line change
Expand Up @@ -33,8 +33,14 @@ extern "C" {

#include <iomanip>

#include "constants-aarch32.h"
#include "operands-aarch32.h"
#include "aarch32/constants-aarch32.h"
#include "aarch32/operands-aarch32.h"

// Microsoft Visual C++ defines a `mvn` macro that conflicts with our own
// definition.
#if defined(_MSC_VER) && defined(mvn)
#undef mvn
#endif

namespace vixl {
namespace aarch32 {
Expand Down
17 changes: 11 additions & 6 deletions dep/vixl/include/vixl/aarch32/instructions-aarch32.h
Original file line number Diff line number Diff line change
Expand Up @@ -34,13 +34,14 @@ extern "C" {
#include <algorithm>
#include <ostream>

#include "../code-buffer-vixl.h"
#include "../utils-vixl.h"
#include "code-buffer-vixl.h"
#include "utils-vixl.h"
#include "aarch32/constants-aarch32.h"

#include "constants-aarch32.h"

#ifdef __arm__
#if defined(__arm__) && !defined(__SOFTFP__)
#define HARDFLOAT __attribute__((noinline, pcs("aapcs-vfp")))
#elif defined(_MSC_VER)
#define HARDFLOAT __declspec(noinline)
#else
#define HARDFLOAT __attribute__((noinline))
#endif
Expand Down Expand Up @@ -492,6 +493,8 @@ class RegisterList {
}
Register GetFirstAvailableRegister() const;
bool IsEmpty() const { return list_ == 0; }
bool IsSingleRegister() const { return IsPowerOf2(list_); }
int GetCount() const { return CountSetBits(list_); }
static RegisterList Union(const RegisterList& list_1,
const RegisterList& list_2) {
return RegisterList(list_1.list_ | list_2.list_);
Expand Down Expand Up @@ -1039,7 +1042,9 @@ class Sign {
const char* GetName() const { return (IsPlus() ? "" : "-"); }
bool IsPlus() const { return sign_ == plus; }
bool IsMinus() const { return sign_ == minus; }
int32_t ApplyTo(uint32_t value) { return IsPlus() ? value : -value; }
int32_t ApplyTo(uint32_t value) {
return IsPlus() ? value : UnsignedNegate(value);
}

private:
SignType sign_;
Expand Down
12 changes: 6 additions & 6 deletions dep/vixl/include/vixl/aarch32/location-aarch32.h
Original file line number Diff line number Diff line change
Expand Up @@ -36,9 +36,9 @@ extern "C" {
#include <iomanip>
#include <list>

#include "../invalset-vixl.h"
#include "../pool-manager.h"
#include "../utils-vixl.h"
#include "invalset-vixl.h"
#include "pool-manager.h"
#include "utils-vixl.h"

#include "constants-aarch32.h"
#include "instructions-aarch32.h"
Expand All @@ -58,12 +58,12 @@ class Location : public LocationBase<int32_t> {
// with the assembler methods for generating instructions, but will never
// be handled by the pool manager.
Location()
: LocationBase<int32_t>(kRawLocation, 1 /* dummy size*/),
: LocationBase<int32_t>(kRawLocation, 1 /* placeholder size*/),
referenced_(false) {}

typedef int32_t Offset;

~Location() {
~Location() VIXL_NEGATIVE_TESTING_ALLOW_EXCEPTION {
#ifdef VIXL_DEBUG
if (IsReferenced() && !IsBound()) {
VIXL_ABORT_WITH_MSG("Location, label or literal used but not bound.\n");
Expand Down Expand Up @@ -217,7 +217,7 @@ class Location : public LocationBase<int32_t> {

protected:
// Types passed to LocationBase. Must be distinct for unbound Locations (not
// relevant for bound locations, as they don't have a correspoding
// relevant for bound locations, as they don't have a corresponding
// PoolObject).
static const int kRawLocation = 0; // Will not be used by the pool manager.
static const int kVeneerType = 1;
Expand Down
99 changes: 59 additions & 40 deletions dep/vixl/include/vixl/aarch32/macro-assembler-aarch32.h
Original file line number Diff line number Diff line change
Expand Up @@ -28,15 +28,15 @@
#ifndef VIXL_AARCH32_MACRO_ASSEMBLER_AARCH32_H_
#define VIXL_AARCH32_MACRO_ASSEMBLER_AARCH32_H_

#include "../code-generation-scopes-vixl.h"
#include "../macro-assembler-interface.h"
#include "../pool-manager-impl.h"
#include "../pool-manager.h"
#include "../utils-vixl.h"
#include "code-generation-scopes-vixl.h"
#include "macro-assembler-interface.h"
#include "pool-manager-impl.h"
#include "pool-manager.h"
#include "utils-vixl.h"

#include "assembler-aarch32.h"
#include "instructions-aarch32.h"
#include "operands-aarch32.h"
#include "aarch32/assembler-aarch32.h"
#include "aarch32/instructions-aarch32.h"
#include "aarch32/operands-aarch32.h"

namespace vixl {

Expand Down Expand Up @@ -268,7 +268,8 @@ class MacroAssembler : public Assembler, public MacroAssemblerInterface {
generate_simulator_code_(VIXL_AARCH32_GENERATE_SIMULATOR_CODE),
pool_end_(NULL) {
#ifdef VIXL_DEBUG
SetAllowMacroInstructions(true);
SetAllowMacroInstructions( // NOLINT(clang-analyzer-optin.cplusplus.VirtualCall)
true);
#else
USE(allow_macro_instructions_);
#endif
Expand All @@ -283,7 +284,8 @@ class MacroAssembler : public Assembler, public MacroAssemblerInterface {
generate_simulator_code_(VIXL_AARCH32_GENERATE_SIMULATOR_CODE),
pool_end_(NULL) {
#ifdef VIXL_DEBUG
SetAllowMacroInstructions(true);
SetAllowMacroInstructions( // NOLINT(clang-analyzer-optin.cplusplus.VirtualCall)
true);
#endif
}
MacroAssembler(byte* buffer, size_t size, InstructionSet isa = kDefaultISA)
Expand All @@ -296,7 +298,8 @@ class MacroAssembler : public Assembler, public MacroAssemblerInterface {
generate_simulator_code_(VIXL_AARCH32_GENERATE_SIMULATOR_CODE),
pool_end_(NULL) {
#ifdef VIXL_DEBUG
SetAllowMacroInstructions(true);
SetAllowMacroInstructions( // NOLINT(clang-analyzer-optin.cplusplus.VirtualCall)
true);
#endif
}

Expand Down Expand Up @@ -399,13 +402,13 @@ class MacroAssembler : public Assembler, public MacroAssemblerInterface {
VIXL_ASSERT(GetBuffer()->Is32bitAligned());
}
// If we need to add padding, check if we have to emit the pool.
const int32_t pc = GetCursorOffset();
if (label->Needs16BitPadding(pc)) {
const int32_t cursor = GetCursorOffset();
if (label->Needs16BitPadding(cursor)) {
const int kPaddingBytes = 2;
if (pool_manager_.MustEmit(pc, kPaddingBytes)) {
int32_t new_pc = pool_manager_.Emit(this, pc, kPaddingBytes);
USE(new_pc);
VIXL_ASSERT(new_pc == GetCursorOffset());
if (pool_manager_.MustEmit(cursor, kPaddingBytes)) {
int32_t new_cursor = pool_manager_.Emit(this, cursor, kPaddingBytes);
USE(new_cursor);
VIXL_ASSERT(new_cursor == GetCursorOffset());
}
}
pool_manager_.Bind(this, label, GetCursorOffset());
Expand All @@ -427,30 +430,30 @@ class MacroAssembler : public Assembler, public MacroAssemblerInterface {
Location* location,
Condition* cond = NULL) {
int size = info->size;
int32_t pc = GetCursorOffset();
int32_t cursor = GetCursorOffset();
// If we need to emit a branch over the instruction, take this into account.
if ((cond != NULL) && NeedBranch(cond)) {
size += kBranchSize;
pc += kBranchSize;
cursor += kBranchSize;
}
int32_t from = pc;
int32_t from = cursor;
from += IsUsingT32() ? kT32PcDelta : kA32PcDelta;
if (info->pc_needs_aligning) from = AlignDown(from, 4);
int32_t min = from + info->min_offset;
int32_t max = from + info->max_offset;
ForwardReference<int32_t> temp_ref(pc,
ForwardReference<int32_t> temp_ref(cursor,
info->size,
min,
max,
info->alignment);
if (pool_manager_.MustEmit(GetCursorOffset(), size, &temp_ref, location)) {
int32_t new_pc = pool_manager_.Emit(this,
GetCursorOffset(),
info->size,
&temp_ref,
location);
USE(new_pc);
VIXL_ASSERT(new_pc == GetCursorOffset());
int32_t new_cursor = pool_manager_.Emit(this,
GetCursorOffset(),
info->size,
&temp_ref,
location);
USE(new_cursor);
VIXL_ASSERT(new_cursor == GetCursorOffset());
}
}

Expand All @@ -461,13 +464,13 @@ class MacroAssembler : public Assembler, public MacroAssemblerInterface {
// into account, as well as potential 16-bit padding needed to reach the
// minimum accessible location.
int alignment = literal->GetMaxAlignment();
int32_t pc = GetCursorOffset();
int total_size = AlignUp(pc, alignment) - pc + literal->GetSize();
if (literal->Needs16BitPadding(pc)) total_size += 2;
if (pool_manager_.MustEmit(pc, total_size)) {
int32_t new_pc = pool_manager_.Emit(this, pc, total_size);
USE(new_pc);
VIXL_ASSERT(new_pc == GetCursorOffset());
int32_t cursor = GetCursorOffset();
int total_size = AlignUp(cursor, alignment) - cursor + literal->GetSize();
if (literal->Needs16BitPadding(cursor)) total_size += 2;
if (pool_manager_.MustEmit(cursor, total_size)) {
int32_t new_cursor = pool_manager_.Emit(this, cursor, total_size);
USE(new_cursor);
VIXL_ASSERT(new_cursor == GetCursorOffset());
}
pool_manager_.Bind(this, literal, GetCursorOffset());
literal->EmitPoolObject(this);
Expand Down Expand Up @@ -2894,7 +2897,12 @@ class MacroAssembler : public Assembler, public MacroAssemblerInterface {
VIXL_ASSERT(OutsideITBlock());
MacroEmissionCheckScope guard(this);
ITScope it_scope(this, &cond, guard);
pop(cond, registers);
if (registers.IsSingleRegister() &&
(!IsUsingT32() || !registers.IsR0toR7orPC())) {
pop(cond, registers.GetFirstAvailableRegister());
} else if (!registers.IsEmpty()) {
pop(cond, registers);
}
}
void Pop(RegisterList registers) { Pop(al, registers); }

Expand All @@ -2914,7 +2922,12 @@ class MacroAssembler : public Assembler, public MacroAssemblerInterface {
VIXL_ASSERT(OutsideITBlock());
MacroEmissionCheckScope guard(this);
ITScope it_scope(this, &cond, guard);
push(cond, registers);
if (registers.IsSingleRegister() && !registers.Includes(sp) &&
(!IsUsingT32() || !registers.IsR0toR7orLR())) {
push(cond, registers.GetFirstAvailableRegister());
} else if (!registers.IsEmpty()) {
push(cond, registers);
}
}
void Push(RegisterList registers) { Push(al, registers); }

Expand All @@ -2924,7 +2937,12 @@ class MacroAssembler : public Assembler, public MacroAssemblerInterface {
VIXL_ASSERT(OutsideITBlock());
MacroEmissionCheckScope guard(this);
ITScope it_scope(this, &cond, guard);
push(cond, rt);
if (IsUsingA32() && rt.IsSP()) {
// Only the A32 multiple-register form can push sp.
push(cond, RegisterList(rt));
} else {
push(cond, rt);
}
}
void Push(Register rt) { Push(al, rt); }

Expand Down Expand Up @@ -11170,10 +11188,11 @@ class UseScratchRegisterScope {
uint32_t old_available_; // kRRegister
uint64_t old_available_vfp_; // kVRegister

VIXL_DEBUG_NO_RETURN UseScratchRegisterScope(const UseScratchRegisterScope&) {
VIXL_NO_RETURN_IN_DEBUG_MODE UseScratchRegisterScope(
const UseScratchRegisterScope&) {
VIXL_UNREACHABLE();
}
VIXL_DEBUG_NO_RETURN void operator=(const UseScratchRegisterScope&) {
VIXL_NO_RETURN_IN_DEBUG_MODE void operator=(const UseScratchRegisterScope&) {
VIXL_UNREACHABLE();
}
};
Expand Down
Loading

0 comments on commit f0c2832

Please sign in to comment.