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[doc] Updated list of supported devices
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Nightwalker-87 committed Apr 1, 2020
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2 changes: 1 addition & 1 deletion README.md
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Expand Up @@ -32,7 +32,7 @@ These programmer boards are available in four versions:

## Supported hardware combinations

Currently known working combinations of programmers and targets are listed in [doc/tested-boards.md](doc/tested-boards.md).
Currently known working combinations of programmers and targets are listed in [doc/devices_boards.md](doc/tested-boards.md).


## Installation
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197 changes: 197 additions & 0 deletions doc/devices_boards.md
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Boards supported by the STlink toolset
======================================

The following devices are suported by the STlink tools.

Notes:
* Nucleo-Boards ship with an included STLink-v2-1 programmer.
* Discovery-Boards ship with an included STLink-v2 programmer.

All Boards are expected to work with ST-Link-v2 programmers.


**STM32F0 / ARM Cortex M0 / Core-ID: 0x0bb11477 (STM32_[?]_CORE_ID)** _STM32F0_CORE_ID_

| Chip-ID | Product-Code |
| --- | --- |
| 0x440 | STM32F0**30**x**8** |
| 0x442 | STM32F0**30**x**C** |
| 0x444 | STM32F0**3**xx**4** |
| 0x444 | STM32F0**3**xx**6** |
| 0x445 | STM32F0**4**xxx |
| 0x440 | STM32F0**5**xxx |
| 0x445 | STM32F0**70**x**6** |
| 0x448 | STM32F0**70**x**B** |
| 0x448 | STM32F0**71**xx |
| 0x448 | STM32F0**72**xx |
| 0x442 | STM32F0**9**xxx |

Tested boards [incl. STLink programmers]:
* Nucleo-F030R8 [v2-1]
* Nucleo-32 [v2-1]
* STM32F0-Discovery [v2]
* STM320518-EVAL
* Nucleo-F072RB [v2-1]
* Nucleo-F091RC [v2-1]


**STM32F1 / ARM Cortex M3 / Core-ID: 0x1ba01477 (STM32VL_CORE_ID)** [VL/F0/F3/F1_XL core id]

| Product-Code | Product Line |
| --- | --- |
| STM32F10**0**yyxx | Value line (V) |
| STM32F10**1**yyxx | Access line (A) |
| STM32F10**2**yyxx | USB Access line (USB-A) |
| STM32F10**3**yyxx | Performance line (P) |
| STM32F10**5**yyxx | Connectivity line (C) |
| STM32F10**7**yyxx | Connectivity line (C) |

| Chip-ID | Product Line | Code (yy) | V | A | USB-A | P | C |
| --- | --- | --- | --- | --- | --- | --- | --- |
| 0x412 | Low-Density | x4 x6 | F100 | F101 | F102 | F103 | |
| 0x410 | Medium Density | x8 xB | | F101 | F102 | F103 | |
| 0x414 | High density | xC xD xE | | F101 | F103 | | |
| 0x418 | STM32F105xx/107xx | x8 xB xC | | | | | F105<br />F107 |
| 0x420 | Medium density value | x8 xB | F100 | | | | |
| 0x428 | High density Value | xC xD xE | F100 | | | | |
| 0x430 | XL-Density | xF XG | | F101 | | F103 | |

Tested boards [incl. STLink programmers]:
* 32VL-Discovery (STM32F100RBT6) with STLink-v1 [v1, v2]
* STM32F103-Bluepill: C8Tx & R8xx [v2]
* Nucleo-F103RB [v2-1]
* HY-STM32 (STM32F103VETx) [v1, v2]
* DecaWave EVB1000 (STM32F105RCTx) [v1, v2]


**STM32F2 / ARM Cortex M3 / Core-ID: 0x2ba01477 (STM32_[?]_CORE_ID)**

| Chip-ID | Product-Code | Product Line |
| --- | --- | --- |
| 0x411 | STM32F2yyxx | (all devices) |


**STM32F1 / ARM Cortex M3 / Core-ID: 0x2ba01477 (STM32_[?]_CORE_ID)**

| Product-Code | Chip-ID | STLink<br />Programmer | Boards |
| --- | --- | --- | --- |
| CKS32F103C8Tx | 0x410 | v2 | "STM32"-Bluepill ( _**Fake-Marking !**_ )<br />STM32F103C8T6 clone from China Key Systems (CKS) |
| CKS32F103C8Tx | 0x410 | v2 | CKS32-Bluepill (Clone)<br />STM32F103C8T6 clone from China Key Systems (CKS) |


**STM32F3 / ARM Cortex M4F / Core-ID: 0x2ba01477 (STM32_[?]_CORE_ID)** _STM32F3_CORE_ID_ _STM32L_CORE_ID_

| Product-Code | Product Line |
| --- | --- |
| STM32F3**01**yyxx | Access line (A) |
| STM32F3**02**yyxx | USB & CAN line (USB/CAN) |
| STM32F3**03**yyxx | Performance line (P) |
| STM32F3**34**yy | Digital Power line (DP) |
| STM32F3**73**yy | Precision Measurement line (PM) 64k/16k / 128k/24k / 265k/32k |
| STM32F3**18**yy | General Purpose line (GP) 64k/16k |
| STM32F3**28**yy | General Purpose line (GP) 64k/16k |
| STM32F3**58**yy | General Purpose line (GP) 265k/48k |
| STM32F3**78**yy | Precision Measurement line (PM) 265k/32k |
| STM32F3**98**yy | General Purpose line (GP) 512k/80k |

| Chip-ID | Product Line | Code (yy) | A | USB/CAN | P | others |
| --- | --- | --- | --- | --- | --- | --- |
| 0x422 | _N/A_ | xB xC | | F302 | F303 | |
| 0x422 | _N/A_ | - | | | | F358 |
| 0x432 | _N/A_ | - | | | | F373<br />F378 |
| 0x438 | _N/A_ | x4 x6 x8 | | | F303 | |
| 0x438 | _N/A_ | - | | | | F334<br />F328 |
| 0x439 | _N/A_ | x4 x6 x8 | F301 | F302 | | |
| 0x439 | _N/A_ | - | | | | F318 |
| 0x446 | _N/A_ | xD xE | | F302 | F303 | |
| 0x446 | _N/A_ | - | | | | F398 |

Tested boards [incl. STLink programmers]:
* Nucleo-F302K8 [v2-1]
* Nucleo-F303K8 [v2-1]
* STM32F3348-Discovery [v2-1]
* Nucleo-F334R8 [v2-1]
* STM32F303-Discovery [v2]
* Nucleo-F303RE [v2-1]


**STM32F3 / ARM Cortex M4F / Core-ID: 0x2ba01477 (STM32_[?]_CORE_ID)**

| Product-Code | Chip-ID | STLink<br />Programmer | Boards |
| --- | --- | --- | --- |
| GD32F303VGT6 | 0x430 | _N/A_ | STM32F303 clone from GigaDevice GD)<br />_unsupported_ |


**STM32F4 / ARM Cortex M4F / Core-ID: 0x2ba01477 (STM32_[?]_CORE_ID)** _STM32F4_CORE_ID_ _STM32L_CORE_ID_

| Chip-ID | Product-Code |
| --- | --- |
| 0x413 | STM32F4**0**xxx |
| 0x413 | STM32F4**1**xxx |
| 0x419 | STM32F4**2**xxx |
| 0x419 | STM32F4**3**xxx |
| 0x423 | STM32F4**01**x**B** |
| 0x423 | STM32F4**01**x**C** |
| 0x433 | STM32F4**01**x**D** |
| 0x433 | STM32F4**01**x**E** |
| 0x458 | STM32F4**10**xx |
| 0x431 | STM32F4**11**xx |
| 0x441 | STM32F4**12**xx |
| 0x421 | STM32F4**46**xx |
| 0x434 | STM32F4**69**xx |
| 0x434 | STM32F4**79**xx |
| 0x463 | STM32F4**13**xx |
| 0x463 | STM32F4**23**xx |

Tested boards [incl. STLink programmers]:
* STM32F407-Discovery [v2]
* 32F411E-Discovery with gyro, audio [v2]
* 32F429I-Discovery with LCD [v2]
* 32F439VIT6-Discovery [v2] (reseated MCU)
* Nucleo-F401RE [v2-1]
* Nucleo-F411RE [v2-1]
* 32F413H-Discovery [v2-1]


**STM32F7 / ARM Cortex M7F / Core-ID: 0x5ba02477 (STM32F7_CORE_ID)**

| Chip-ID | Product-Code |
| --- | --- |
| 0x452 | STM32F7**2**xxx |
| 0x452 | STM32F7**3**xxx |
| 0x449 | STM32F7**4**xxx |
| 0x449 | STM32F7**5**xxx |
| 0x451 | STM32F7**6**xxx |
| 0x451 | STM32F7**7**xxx |

Tested boards [incl. STLink programmers]:
* STM32F756NGHx evaluation board [v2-1]
* 32F769I-Discovery [v2-1]
* Nucleo-F722ZE [v2-1]
* Nucleo-F746ZG [v2-1]


(TBC ...)

-------

- STM32L0 | M0+ |
- STM32L1 | M3 |
- STM32L4 | M4F |
- STM32L5 | M33F |
- STM32G0 | M0+ |
- STM32G4 | M4 |

* STM32L051
* STM32L052K8T6 v2 (custom board)
* STM32L053R8 v2-1 (STM32 Nucleo-L053R8 board (incl. v2-1))

* STM32L1xx v2 (STM32L Discovery board (incl. v2))
* STM32L151CB v2 (custom board)
* STM32L152RB v2 (STM32L-Discovery board, custom board)
* STM32L152RE v2-1 (STM32-Nucleo-L152RE board (incl. v2-1))

* STM32L452RET6 v2-1 (STM32 Nucleo-L452RE board (incl. v2-1))
* STM32L476JG
* STM32L476RG v2-1 (STM32 Nucleo-L476RG board (incl. v2-1))
* STM32L496ZG v2 (STM32-Nucleo-L496ZG board)
57 changes: 0 additions & 57 deletions doc/tested-boards.md

This file was deleted.

32 changes: 10 additions & 22 deletions include/stlink/chipid.h
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Expand Up @@ -28,31 +28,19 @@ enum stlink_stm32_chipids {
STLINK_CHIPID_STM32_F3 = 0x422,
STLINK_CHIPID_STM32_F4_LP = 0x423,
STLINK_CHIPID_STM32_L0_CAT2 = 0x425,
STLINK_CHIPID_STM32_L1_MEDIUM_PLUS = 0x427,
STLINK_CHIPID_STM32_L1_MEDIUM_PLUS = 0x427, /* assigned to some L1 "Medium-plus" chips */
STLINK_CHIPID_STM32_F1_VL_HIGH = 0x428,
STLINK_CHIPID_STM32_L1_CAT2 = 0x429,
STLINK_CHIPID_STM32_F1_XL = 0x430,
STLINK_CHIPID_STM32_F411RE = 0x431,
STLINK_CHIPID_STM32_F37x = 0x432,
STLINK_CHIPID_STM32_F4_DE = 0x433,
STLINK_CHIPID_STM32_F4_DSI = 0x434,
/*
* 0x435 covers STM32L43xxx and STM32L44xxx devices
* 0x461 covers STM32L496xx and STM32L4A6xx devices
* 0x462 covers STM32L45xxx and STM32L46xxx devices
* 0x464 covers STM32L41xxx and STM32L42xxx devices
*/
STLINK_CHIPID_STM32_L43X = 0x435,
STLINK_CHIPID_STM32_L496X = 0x461,
STLINK_CHIPID_STM32_L46X = 0x462,
STLINK_CHIPID_STM32_L41X = 0x464,
/*
* 0x436 is actually assigned to some L1 chips that are called "Medium-Plus"
* and some that are called "High". 0x427 is assigned to the other "Medium-
* plus" chips. To make it a bit simpler we just call 427 MEDIUM_PLUS and
* 0x436 HIGH.
*/
STLINK_CHIPID_STM32_L1_HIGH = 0x436,
STLINK_CHIPID_STM32_L43X = 0x435, /* covers STM32L43xxx and STM32L44xxx devices */
STLINK_CHIPID_STM32_L496X = 0x461, /* covers STM32L496xx and STM32L4A6xx devices */
STLINK_CHIPID_STM32_L46X = 0x462, /* covers STM32L45xxx and STM32L46xxx devices */
STLINK_CHIPID_STM32_L41X = 0x464, /* covers STM32L41xxx and STM32L42xxx devices */
STLINK_CHIPID_STM32_L1_HIGH = 0x436, /* assigned to some L1 chips called "Medium-Plus" and to some called "High" */
STLINK_CHIPID_STM32_L152_RE = 0x437,
STLINK_CHIPID_STM32_F334 = 0x438,
STLINK_CHIPID_STM32_F3_SMALL = 0x439,
Expand All @@ -69,12 +57,12 @@ enum stlink_stm32_chipids {
STLINK_CHIPID_STM32_F72XXX = 0x452, /* This ID is found on the NucleoF722ZE board */
STLINK_CHIPID_STM32_L011 = 0x457,
STLINK_CHIPID_STM32_F410 = 0x458,
STLINK_CHIPID_STM32_G0_CAT2 = 0x460, // G070/G071/081
STLINK_CHIPID_STM32_G0_CAT2 = 0x460, /* G070/G071/081 */
STLINK_CHIPID_STM32_F413 = 0x463,
STLINK_CHIPID_STM32_G0_CAT1 = 0x466, // G030/G031/041
STLINK_CHIPID_STM32_G4_CAT2 = 0x468, // See: RM 0440 s46.6.1 "MCU device ID code".
STLINK_CHIPID_STM32_G0_CAT1 = 0x466, /* G030/G031/041 */
STLINK_CHIPID_STM32_G4_CAT2 = 0x468, /* See: RM 0440 s46.6.1 "MCU device ID code" */
STLINK_CHIPID_STM32_G4_CAT3 = 0x469,
STLINK_CHIPID_STM32_L4RX = 0x470, // taken from the STM32L4R9I-DISCO board
STLINK_CHIPID_STM32_L4RX = 0x470, /* taken from the STM32L4R9I-DISCO board */
STLINK_CHIPID_STM32_WB55 = 0x495
};

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