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Original file line number | Diff line number | Diff line change |
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//! ADC interface circular DMA RX transfer test | ||
#![no_main] | ||
#![no_std] | ||
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use panic_halt as _; | ||
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use cortex_m::{asm, singleton}; | ||
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use stm32f1xx_hal::{ | ||
prelude::*, | ||
pac, | ||
adc, | ||
dma::Half, | ||
}; | ||
use cortex_m_rt::entry; | ||
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#[entry] | ||
fn main() -> ! { | ||
// Aquire peripherals | ||
let p = pac::Peripherals::take().unwrap(); | ||
let mut flash = p.FLASH.constrain(); | ||
let mut rcc = p.RCC.constrain(); | ||
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// Configure ADC clocks | ||
// Default value is the slowest possible ADC clock: PCLK2 / 8. Meanwhile ADC | ||
// clock is configurable. So its frequency may be tweaked to meet certain | ||
// practical needs. User specified value is be approximated using supported | ||
// prescaler values 2/4/6/8. | ||
let clocks = rcc.cfgr.adcclk(2.mhz()).freeze(&mut flash.acr); | ||
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let dma_ch1 = p.DMA1.split(&mut rcc.ahb).1; | ||
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// Setup ADC | ||
let adc1 = adc::Adc::adc1(p.ADC1, &mut rcc.apb2, clocks); | ||
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// Setup GPIOA | ||
let mut gpioa = p.GPIOA.split(&mut rcc.apb2); | ||
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// Configure pa0 as an analog input | ||
let adc_ch0 = gpioa.pa0.into_analog(&mut gpioa.crl); | ||
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let adc_dma = adc1.with_dma(adc_ch0, dma_ch1); | ||
let buf = singleton!(: [[u16; 8]; 2] = [[0; 8]; 2]).unwrap(); | ||
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let mut circ_buffer = adc_dma.circ_read(buf); | ||
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while circ_buffer.readable_half().unwrap() != Half::First {} | ||
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let _first_half = circ_buffer.peek(|half, _| *half).unwrap(); | ||
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while circ_buffer.readable_half().unwrap() != Half::Second {} | ||
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let _second_half = circ_buffer.peek(|half, _| *half).unwrap(); | ||
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let (_buf, adc_dma) = circ_buffer.stop(); | ||
let (_adc1, _adc_ch0, _dma_ch1) = adc_dma.split(); | ||
asm::bkpt(); | ||
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loop {} | ||
} |
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Original file line number | Diff line number | Diff line change |
---|---|---|
@@ -0,0 +1,58 @@ | ||
//! ADC interface DMA RX transfer test | ||
#![no_main] | ||
#![no_std] | ||
|
||
use panic_halt as _; | ||
|
||
use cortex_m::{asm, singleton}; | ||
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||
use stm32f1xx_hal::{ | ||
prelude::*, | ||
pac, | ||
adc, | ||
}; | ||
use cortex_m_rt::entry; | ||
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||
#[entry] | ||
fn main() -> ! { | ||
// Aquire peripherals | ||
let p = pac::Peripherals::take().unwrap(); | ||
let mut flash = p.FLASH.constrain(); | ||
let mut rcc = p.RCC.constrain(); | ||
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// Configure ADC clocks | ||
// Default value is the slowest possible ADC clock: PCLK2 / 8. Meanwhile ADC | ||
// clock is configurable. So its frequency may be tweaked to meet certain | ||
// practical needs. User specified value is be approximated using supported | ||
// prescaler values 2/4/6/8. | ||
let clocks = rcc.cfgr.adcclk(2.mhz()).freeze(&mut flash.acr); | ||
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let dma_ch1 = p.DMA1.split(&mut rcc.ahb).1; | ||
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// Setup ADC | ||
let adc1 = adc::Adc::adc1(p.ADC1, &mut rcc.apb2, clocks); | ||
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// Setup GPIOA | ||
let mut gpioa = p.GPIOA.split(&mut rcc.apb2); | ||
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// Configure pa0 as an analog input | ||
let adc_ch0 = gpioa.pa0.into_analog(&mut gpioa.crl); | ||
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let adc_dma = adc1.with_dma(adc_ch0, dma_ch1); | ||
let buf = singleton!(: [u16; 8] = [0; 8]).unwrap(); | ||
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// The read method consumes the buf and self, starts the adc and dma transfer and returns a | ||
// RxDma struct. The wait method consumes the RxDma struct, waits for the whole transfer to be | ||
// completed and then returns the updated buf and underlying adc_dma struct. For non blocking, | ||
// one can call the is_done method of RxDma and only call wait after that method returns true. | ||
let (_buf, adc_dma) = adc_dma.read(buf).wait(); | ||
asm::bkpt(); | ||
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// Consumes the AdcDma struct, restores adc configuration to previous state and returns the | ||
// Adc struct in normal mode. | ||
let (_adc1, _adc_ch0, _dma_ch1) = adc_dma.split(); | ||
asm::bkpt(); | ||
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loop {} | ||
} |
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