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Rename Serial items
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AndreySmirnov81 committed Feb 18, 2022
1 parent ab33c09 commit 975f5d0
Showing 1 changed file with 20 additions and 13 deletions.
33 changes: 20 additions & 13 deletions src/serial.rs
Original file line number Diff line number Diff line change
Expand Up @@ -153,10 +153,12 @@ impl<INMODE, OUTMODE> Pins<USART3> for (PD8<Alternate<OUTMODE>>, PD9<Input<INMOD
}

pub enum WordLength {
/// When parity is enabled, a word has 7 data bits + 1 parity bit.
DataBits8,
/// When parity is enabled, a word has 8 data bits + 1 parity bit.
DataBits9,
/// When parity is enabled, a word has 7 data bits + 1 parity bit,
/// otherwise 8 data bits.
Bits8,
/// When parity is enabled, a word has 8 data bits + 1 parity bit,
/// otherwise 9 data bits.
Bits9,
}

pub enum Parity {
Expand Down Expand Up @@ -209,13 +211,18 @@ impl Config {
self
}

pub fn wordlength_8(mut self) -> Self {
self.wordlength = WordLength::DataBits8;
pub fn wordlength_8bits(mut self) -> Self {
self.wordlength = WordLength::Bits8;
self
}

pub fn wordlength_9(mut self) -> Self {
self.wordlength = WordLength::DataBits9;
pub fn wordlength_9bits(mut self) -> Self {
self.wordlength = WordLength::Bits9;
self
}

pub fn wordlength(mut self, wordlength: WordLength) -> Self {
self.wordlength = wordlength;
self
}

Expand All @@ -230,7 +237,7 @@ impl Default for Config {
let baudrate = 115_200_u32.bps();
Config {
baudrate,
wordlength: WordLength::DataBits8,
wordlength: WordLength::Bits8,
parity: Parity::ParityNone,
stopbits: StopBits::STOP1,
}
Expand Down Expand Up @@ -327,8 +334,8 @@ where
};
self.usart.cr1.modify(|_r, w| {
w.m().bit(match config.wordlength {
WordLength::DataBits8 => false,
WordLength::DataBits9 => true,
WordLength::Bits8 => false,
WordLength::Bits9 => true,
});
w.ps().bit(parity_is_odd);
w.pce().bit(parity_is_used)
Expand Down Expand Up @@ -652,7 +659,7 @@ where

/// Reads 9-bit words from the UART/USART
///
/// If the UART/USART was configured with `WordLength::DataBits9`, the returned value will contain
/// If the UART/USART was configured with `WordLength::Bits9`, the returned value will contain
/// 9 received data bits and all other bits set to zero. Otherwise, the returned value will contain
/// 8 received data bits and all other bits set to zero.
impl<USART> crate::hal::serial::Read<u16> for Rx<USART, u16>
Expand Down Expand Up @@ -733,7 +740,7 @@ where

/// Writes 9-bit words to the UART/USART
///
/// If the UART/USART was configured with `WordLength::DataBits9`, the 9 least significant bits will
/// If the UART/USART was configured with `WordLength::Bits9`, the 9 least significant bits will
/// be transmitted and the other 7 bits will be ignored. Otherwise, the 8 least significant bits
/// will be transmitted and the other 8 bits will be ignored.
impl<USART> crate::hal::serial::Write<u16> for Tx<USART, u16>
Expand Down

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