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Merge #397
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397: Connectivity line devices config supports ADC2 r=burrbull a=apeng2012

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Please write a short description of your changes.

We also maintain a changelog in CHANGELOG.md. If you add a feature or fix a bug, please add an entry there :)


Co-authored-by: apeng2012 <apeng2012@gmail.com>
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bors[bot] and apeng2012 authored Feb 7, 2022
2 parents 7671c1f + c56d9c4 commit f2dfe9a
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Showing 3 changed files with 7 additions and 6 deletions.
1 change: 1 addition & 0 deletions CHANGELOG.md
Original file line number Diff line number Diff line change
Expand Up @@ -14,6 +14,7 @@ and this project adheres to [Semantic Versioning](http://semver.org/).

### Changed

- Connectivity line devices configuration supports ADC2
- replace `GetBusFreq` with `BusClock` and `BusTimerClock`

## [v0.8.0] - 2021-12-29
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6 changes: 3 additions & 3 deletions examples/adc.rs
Original file line number Diff line number Diff line change
Expand Up @@ -27,7 +27,7 @@ fn main() -> ! {
// Setup ADC
let mut adc1 = adc::Adc::adc1(p.ADC1, clocks);

#[cfg(feature = "stm32f103")]
#[cfg(any(feature = "stm32f103", feature = "connectivity"))]
let mut adc2 = adc::Adc::adc2(p.ADC2, clocks);

// Setup GPIOB
Expand All @@ -36,14 +36,14 @@ fn main() -> ! {
// Configure pb0, pb1 as an analog input
let mut ch0 = gpiob.pb0.into_analog(&mut gpiob.crl);

#[cfg(feature = "stm32f103")]
#[cfg(any(feature = "stm32f103", feature = "connectivity"))]
let mut ch1 = gpiob.pb1.into_analog(&mut gpiob.crl);

loop {
let data: u16 = adc1.read(&mut ch0).unwrap();
hprintln!("adc1: {}", data).unwrap();

#[cfg(feature = "stm32f103")]
#[cfg(any(feature = "stm32f103", feature = "connectivity"))]
{
let data1: u16 = adc2.read(&mut ch1).unwrap();
hprintln!("adc2: {}", data1).unwrap();
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6 changes: 3 additions & 3 deletions src/adc.rs
Original file line number Diff line number Diff line change
Expand Up @@ -15,7 +15,7 @@ use core::sync::atomic::{self, Ordering};
use cortex_m::asm::delay;
use embedded_dma::StaticWriteBuffer;

#[cfg(feature = "stm32f103")]
#[cfg(any(feature = "stm32f103", feature = "connectivity"))]
use crate::pac::ADC2;
#[cfg(all(feature = "stm32f103", any(feature = "high", feature = "xl")))]
use crate::pac::ADC3;
Expand Down Expand Up @@ -137,7 +137,7 @@ adc_pins!(ADC1,
gpioc::PC5<Analog> => 15_u8,
);

#[cfg(any(feature = "stm32f103",))]
#[cfg(any(feature = "stm32f103", feature = "connectivity"))]
adc_pins!(ADC2,
gpioa::PA0<Analog> => 0_u8,
gpioa::PA1<Analog> => 1_u8,
Expand Down Expand Up @@ -547,7 +547,7 @@ adc_hal! {
ADC1: (adc1),
}

#[cfg(feature = "stm32f103")]
#[cfg(any(feature = "stm32f103", feature = "connectivity"))]
adc_hal! {
ADC2: (adc2),
}
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