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alternative implementation for SPI pins #145

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Dec 2, 2019
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2 changes: 2 additions & 0 deletions CHANGELOG.md
Original file line number Diff line number Diff line change
Expand Up @@ -38,6 +38,8 @@ and this project adheres to [Semantic Versioning](http://semver.org/).

### Changed

- Pins can be passed in any order to SPI constructor,
`NoSck`, `NoMiso` and `NoMosi` can be also passed instead of real pin
- DMA traits now require AsSlice instead of AsRef
- GPIO `downgrade` function now returns a `Pxx` instead of a type specific to a
GPIO port
Expand Down
5 changes: 5 additions & 0 deletions src/rcc.rs
Original file line number Diff line number Diff line change
Expand Up @@ -557,6 +557,11 @@ bus! {
WWDG => (APB1, wwdgen, wwdgrst),
}

#[cfg(feature = "high")]
bus! {
SPI3 => (APB1, spi3en, spi3rst),
}

ahb_bus! {
CRC => (crcen),
DMA1 => (dma1en),
Expand Down
198 changes: 148 additions & 50 deletions src/spi.rs
Original file line number Diff line number Diff line change
@@ -1,11 +1,43 @@
//! # Serial Peripheral Interface
/*!
# Serial Peripheral Interface

## Alternate function remapping

### SPI1

| Function | Spi1NoRemap | Spi1Remap |
|:----:|:-----------:|:---------:|
| SCK | PA5 | PB3 |
| MISO | PA6 | PB4 |
| MOSI | PA7 | PB5 |

### SPI2

| Function | Spi2NoRemap |
|:----:|:-----------:|
| SCK | PB13 |
| MISO | PB14 |
| MOSI | PB15 |

### SPI3

Available only on high density devices.

| Function | Spi3NoRemap | Spi3Remap |
|:----:|:-----------:|:---------:|
| SCK | PB3 | PC10 |
| MISO | PB4 | PC11 |
| MOSI | PB5 | PC12 |
*/

use core::ptr;

use nb;

pub use crate::hal::spi::{Mode, Phase, Polarity};
use crate::pac::{SPI1, SPI2};
#[cfg(feature="high")]
use crate::pac::SPI3;

use crate::afio::MAPR;
use crate::gpio::gpioa::{PA5, PA6, PA7};
Expand Down Expand Up @@ -33,47 +65,88 @@ pub enum Error {
_Extensible,
}

pub trait Pins<SPI> {
const REMAP: bool;
}
use core::marker::PhantomData;

impl Pins<SPI1>
for (
PA5<Alternate<PushPull>>,
PA6<Input<Floating>>,
PA7<Alternate<PushPull>>,
)
{
const REMAP: bool = false;
mod sealed {
pub trait Remap {
type Periph;
const REMAP: bool;
}
pub trait Sck<REMAP> {}
pub trait Miso<REMAP> {}
pub trait Mosi<REMAP> {}
pub struct _Sck;
pub struct _Miso;
pub struct _Mosi;
}
use sealed::{Remap, Sck, Miso, Mosi};

impl Pins<SPI1>
for (
PB3<Alternate<PushPull>>,
PB4<Input<Floating>>,
PB5<Alternate<PushPull>>,
)
{
const REMAP: bool = true;
pub trait Pins<SPI, P> {
type _Pos;
}

impl Pins<SPI2>
for (
PB13<Alternate<PushPull>>,
PB14<Input<Floating>>,
PB15<Alternate<PushPull>>,
)
{
const REMAP: bool = false;
macro_rules! pins_impl {
( $( ( $($PINX:ident),+ ), ( $($TRAIT:ident),+ ), ( $($POS:ident),* ); )+ ) => {
$(
#[allow(unused_parens)]
impl<REMAP, $($PINX,)+> Pins<REMAP, ($(sealed::$POS),+)> for ($($PINX),+)
where
$($PINX: $TRAIT<REMAP>,)+
{
type _Pos = ($(sealed::$POS),+);
}
)+
};
}

pub struct Spi<SPI, PINS> {
pins_impl!(
(SCK, MISO, MOSI), (Sck, Miso, Mosi), (_Sck, _Miso, _Mosi);
(SCK, MOSI, MISO), (Sck, Mosi, Miso), (_Sck, _Mosi, _Miso);
(MOSI, SCK, MISO), (Mosi, Sck, Miso), (_Mosi, _Sck, _Miso);
(MOSI, MISO, SCK), (Mosi, Miso, Sck), (_Mosi, _Miso, _Sck);
(MISO, MOSI, SCK), (Miso, Mosi, Sck), (_Miso, _Mosi, _Sck);
(MISO, SCK, MOSI), (Miso, Sck, Mosi), (_Miso, _Sck, _Mosi);
);

pub struct Spi<SPI, REMAP, PINS> {
spi: SPI,
pins: PINS,
_remap: PhantomData<REMAP>,
}

impl<PINS> Spi<SPI1, PINS> {
pub fn spi1<F>(
/// A filler type for when the SCK pin is unnecessary
pub struct NoSck;
/// A filler type for when the Miso pin is unnecessary
pub struct NoMiso;
/// A filler type for when the Mosi pin is unnecessary
pub struct NoMosi;

impl<REMAP> Sck<REMAP> for NoSck {}
impl<REMAP> Miso<REMAP> for NoMiso {}
impl<REMAP> Mosi<REMAP> for NoMosi {}

macro_rules! remap {
($name:ident, $SPIX:ident, $state:literal, $SCK:ident, $MISO:ident, $MOSI:ident) => {
pub struct $name;
impl Remap for $name {
type Periph = $SPIX;
const REMAP: bool = $state;
}
impl Sck<$name> for $SCK<Alternate<PushPull>> {}
impl Miso<$name> for $MISO<Input<Floating>> {}
impl Mosi<$name> for $MOSI<Alternate<PushPull>> {}
}
}

remap!(Spi1NoRemap, SPI1, false, PA5, PA6, PA7);
remap!(Spi1Remap, SPI1, true, PB3, PB4, PB5);
remap!(Spi2NoRemap, SPI2, false, PB13, PB14, PB15);
#[cfg(feature="high")]
remap!(Spi3NoRemap, SPI3, false, PB3, PB4, PB5);
#[cfg(feature = "stm32f105")]
remap!(Spi3Remap, SPI3, true, PC10, PC11, PC12);

impl<REMAP, PINS> Spi<SPI1, REMAP, PINS> {
pub fn spi1<F, POS>(
spi: SPI1,
pins: PINS,
mapr: &mut MAPR,
Expand All @@ -84,15 +157,16 @@ impl<PINS> Spi<SPI1, PINS> {
) -> Self
where
F: Into<Hertz>,
PINS: Pins<SPI1>,
REMAP: Remap<Periph = SPI1>,
PINS: Pins<REMAP, POS>,
{
mapr.modify_mapr(|_, w| w.spi1_remap().bit(PINS::REMAP));
mapr.modify_mapr(|_, w| w.spi1_remap().bit(REMAP::REMAP));
Spi::_spi1(spi, pins, mode, freq.into(), clocks, apb)
}
}

impl<PINS> Spi<SPI2, PINS> {
pub fn spi2<F>(
impl<REMAP, PINS> Spi<SPI2, REMAP, PINS> {
pub fn spi2<F, POS>(
spi: SPI2,
pins: PINS,
mode: Mode,
Expand All @@ -102,16 +176,36 @@ impl<PINS> Spi<SPI2, PINS> {
) -> Self
where
F: Into<Hertz>,
PINS: Pins<SPI2>,
REMAP: Remap<Periph = SPI2>,
PINS: Pins<REMAP, POS>,
{
Spi::_spi2(spi, pins, mode, freq.into(), clocks, apb)
}
}

#[cfg(feature="high")]
impl<REMAP, PINS> Spi<SPI3, REMAP, PINS> {
pub fn spi3<F, POS>(
spi: SPI3,
pins: PINS,
mode: Mode,
freq: F,
clocks: Clocks,
apb: &mut <SPI3 as RccBus>::Bus,
) -> Self
where
F: Into<Hertz>,
REMAP: Remap<Periph = SPI3>,
PINS: Pins<REMAP, POS>,
{
Spi::_spi3(spi, pins, mode, freq.into(), clocks, apb)
}
}

macro_rules! hal {
($($SPIX:ident: ($spiX:ident),)+) => {
$(
impl<PINS> Spi<$SPIX, PINS> {
impl<REMAP, PINS> Spi<$SPIX, REMAP, PINS> {
fn $spiX(
spi: $SPIX,
pins: PINS,
Expand Down Expand Up @@ -171,15 +265,15 @@ macro_rules! hal {
.set_bit()
);

Spi { spi, pins }
Spi { spi, pins, _remap: PhantomData }
}

pub fn free(self) -> ($SPIX, PINS) {
(self.spi, self.pins)
}
}

impl<PINS> crate::hal::spi::FullDuplex<u8> for Spi<$SPIX, PINS> {
impl<REMAP, PINS> crate::hal::spi::FullDuplex<u8> for Spi<$SPIX, REMAP, PINS> {
type Error = Error;

fn read(&mut self) -> nb::Result<u8, Error> {
Expand Down Expand Up @@ -222,9 +316,9 @@ macro_rules! hal {

}

impl<PINS> crate::hal::blocking::spi::transfer::Default<u8> for Spi<$SPIX, PINS> {}
impl<REMAP, PINS> crate::hal::blocking::spi::transfer::Default<u8> for Spi<$SPIX, REMAP, PINS> {}

impl<PINS> crate::hal::blocking::spi::write::Default<u8> for Spi<$SPIX, PINS> {}
impl<REMAP, PINS> crate::hal::blocking::spi::write::Default<u8> for Spi<$SPIX, REMAP, PINS> {}
)+
}
}
Expand All @@ -233,32 +327,36 @@ hal! {
SPI1: (_spi1),
SPI2: (_spi2),
}
#[cfg(feature="high")]
hal! {
SPI3: (_spi3),
}

// DMA

pub struct SpiPayload<SPI, PINS> {
spi: Spi<SPI, PINS>
pub struct SpiPayload<SPI, REMAP, PINS> {
spi: Spi<SPI, REMAP, PINS>
}

pub type SpiTxDma<SPI, PINS, CHANNEL> = TxDma<SpiPayload<SPI, PINS>, CHANNEL>;
pub type SpiTxDma<SPI, REMAP, PINS, CHANNEL> = TxDma<SpiPayload<SPI, REMAP, PINS>, CHANNEL>;

macro_rules! spi_dma {
($SPIi:ident, $TCi:ident) => {
impl<PINS> Transmit for SpiTxDma<$SPIi, PINS, $TCi> {
impl<REMAP, PINS> Transmit for SpiTxDma<$SPIi, REMAP, PINS, $TCi> {
type TxChannel = $TCi;
type ReceivedWord = u8;
}

impl<PINS> Spi<$SPIi, PINS> {
pub fn with_tx_dma(self, channel: $TCi) -> SpiTxDma<$SPIi, PINS, $TCi> {
impl<REMAP, PINS> Spi<$SPIi, REMAP, PINS> {
pub fn with_tx_dma(self, channel: $TCi) -> SpiTxDma<$SPIi, REMAP, PINS, $TCi> {
let payload = SpiPayload{
spi: self
};
SpiTxDma {payload, channel}
}
}

impl<PINS> TransferPayload for SpiTxDma<$SPIi, PINS, $TCi> {
impl<REMAP, PINS> TransferPayload for SpiTxDma<$SPIi, REMAP, PINS, $TCi> {
fn start(&mut self) {
self.payload.spi.spi.cr2.modify(|_, w| w.txdmaen().set_bit());
self.channel.start();
Expand All @@ -269,7 +367,7 @@ macro_rules! spi_dma {
}
}

impl<A, B, PIN> crate::dma::WriteDma<A, B, u8> for SpiTxDma<$SPIi, PIN, $TCi>
impl<A, B, REMAP, PIN> crate::dma::WriteDma<A, B, u8> for SpiTxDma<$SPIi, REMAP, PIN, $TCi>
where
A: AsSlice<Element=u8>,
B: Static<A>
Expand Down