Bump dependencies and ensure build success with minimal dependencies

.github/workflows/ci.yml

@@ -70,6 +70,28 @@ jobs:
           command: check
           args: --features=stm32f303xc,stm32-usbd,rt,can,ld --lib --examples
 
+  check-min-deps:
+    name: Check Minimal Dependency Versions
+    runs-on: ubuntu-latest
+    steps:
+      - uses: actions/checkout@v2
+      - uses: actions-rs/toolchain@v1
+        with:
+          toolchain: stable
+          target: thumbv7em-none-eabihf
+          override: true
+          profile: minimal
+      - uses: actions-rs/toolchain@v1
+        with:
+          toolchain: nightly
+          target: thumbv7em-none-eabihf
+          profile: minimal
+      - run: cargo +nightly update -Z minimal-versions
+      - uses: actions-rs/cargo@v1
+        with:
+          command: check
+          args: --features=stm32f303xc,stm32-usbd,rt,can,ld --lib --examples
+
   check-tests:
     name: Check Tests
     runs-on: ubuntu-latest

CHANGELOG.md

@@ -11,6 +11,7 @@ and this project adheres to [Semantic Versioning](http://semver.org/).
 
 - Make `Clocks` `ppre1()` and `ppre2()` methods public, to get the current
   Prescaler value. ([#210])
+- Support for more CAN bit rates and modes. ([#186])
 - Implement `into_xxx` methods for partially erased pins ([#189])
 - Enable better GPIO internal resistor configuration ([#189])
 - Support for GPIO output slew rate configuration ([#189])
@@ -19,7 +20,6 @@ and this project adheres to [Semantic Versioning](http://semver.org/).
 
 ### Changed
 
-- Added support for more CAN bit rates and modes. ([#186])
 - The structure of `gpio.rs` is greatly changed. Generic `Pin` struct is used
   for every GPIO pin now ([#189])
 
@@ -31,14 +31,13 @@ and this project adheres to [Semantic Versioning](http://semver.org/).
 
 ### Breaking Changes
 
-- The MSVR was bumped to 1.51 ([#227])
+- The MSRV was bumped to 1.51 ([#227])
 - Replace custom time based units with types defined in the [embedded-time][]
   crate ([#192])
 - The `rcc` public API now expects time based units in `Megahertz`.
   If the supplied frequency cannot be converted to `Hertz` the code
   will `panic`. This will occur if the supplied `Megahertz` frequency
   cannot fit into `u32::MAX` when converting to `Hertz` ([#192])
-- You always required to select a sub-target for target chips ([#216])
 
 ```rust
 // The supplied frequencies must be in `MHz`.
@@ -51,12 +50,15 @@ let clocks = rcc
     .pclk2(12u32.MHz())
 ```
 
-- Bump dependencies: ([#211])
-  - `stm32f3` dependency to 0.13
-  - `nb` to 1
-  - `cortex-m` to 0.7
-  - `stm32-usbd` to 0.6
-  - `defmt` to 0.2
+- You always required to select a sub-target for target chips ([#216])
+- Bump dependencies: ([#229])
+  - `cortex-m` to 0.7.2
+  - `cortex-m-rt` to 0.6.4
+  - `defmt` to 0.2.2
+  - `embedded-hal` to 0.2.5
+  - `nb` to 1.0.0
+  - `stm32f3` to 0.13.2
+  - `stm32-usbd` to 0.6.0
 - `into_afx` methods are splitted into `into_afx_push_pull` and
   `into_afx_open_drain` ([#189])
 - GPIO output mode (`PushPull` or `OpenDrain`) is encoded into pin typestate
@@ -320,11 +322,11 @@ let clocks = rcc
 [defmt]: https://github.com/knurling-rs/defmt
 [filter]: https://defmt.ferrous-systems.com/filtering.html
 
+[#229]: https://github.com/stm32-rs/stm32f3xx-hal/pull/229
 [#227]: https://github.com/stm32-rs/stm32f3xx-hal/pull/227
 [#220]: https://github.com/stm32-rs/stm32f3xx-hal/pull/220
 [#217]: https://github.com/stm32-rs/stm32f3xx-hal/pull/217
 [#216]: https://github.com/stm32-rs/stm32f3xx-hal/pull/216
-[#211]: https://github.com/stm32-rs/stm32f3xx-hal/pull/211
 [#210]: https://github.com/stm32-rs/stm32f3xx-hal/pull/210
 [#208]: https://github.com/stm32-rs/stm32f3xx-hal/pull/208
 [#203]: https://github.com/stm32-rs/stm32f3xx-hal/issues/203

Cargo.toml

@@ -18,48 +18,39 @@ exclude = [
     "codegen",
     ".markdownlint.yml"
 ]
+resolver = "2"
 
 [package.metadata.docs.rs]
 features = ["stm32f303xc", "rt", "stm32-usbd", "can"]
 targets = ["thumbv7em-none-eabihf"]
 rustc-args = ["--cfg", "docsrs"]
 
 [dependencies]
-cfg-if = "1"
-cortex-m = "0.7"
-cortex-m-rt = "0.6"
-embedded-dma = "0.1"
-embedded-hal = "0.2"
-embedded-time = "0.10"
-nb = "1"
-paste = "1"
-rtcc = "0.2"
-stm32f3 = "0.13"
-
-[dependencies.embedded-hal-can]
-version = "0.1.0"
-optional = true
-
-[dependencies.stm32-usbd]
-version = "0.6"
-optional = true
-
-[dependencies.void]
-version = "1"
-default-features = false
-
-[dependencies.defmt]
-version = "0.2"
-optional = true
+cfg-if = "1.0.0"
+cortex-m = "0.7.2"
+cortex-m-rt = "0.6.14"
+defmt = { version = "0.2.2", optional = true }
+embedded-dma = "0.1.2"
+embedded-hal = "0.2.5"
+embedded-hal-can = { version = "0.1.0", optional = true }
+embedded-time = "0.12.0"
+nb = "1.0.0"
+paste = "1.0.5"
+rtcc = "0.2.1"
+stm32f3 = "0.13.2"
+stm32-usbd = { version = "0.6.0", optional = true }
+void = { version = "1.0.2", default-features = false }
 
 [dev-dependencies]
-panic-semihosting = "0.5"
-usb-device = "0.2"
-usbd-serial = "0.1"
-cortex-m-semihosting = "0.3"
-panic-probe = "0.2"
-defmt-rtt = "0.2"
-defmt-test = "0.2"
+cortex-m = "0.7.2"
+cortex-m-rt = { version = "0.6.13", features = ["device"] }
+cortex-m-semihosting = "0.3.7"
+defmt-rtt = "0.2.0"
+defmt-test = "0.2.3"
+panic-probe = "0.2.0"
+panic-semihosting = "0.5.6"
+usbd-serial = "0.1.1"
+usb-device = "0.2.8"
 
 [build-dependencies]
 cargo_metadata = "0.13.1"

examples/gpio_interrupts.rs

@@ -8,11 +8,11 @@ use stm32f3xx_hal as hal;
 use core::cell::RefCell;
 use cortex_m::asm;
 use cortex_m::interrupt::Mutex;
+use cortex_m::peripheral::NVIC;
 use cortex_m_rt::entry;
 use hal::gpio::{gpioa, gpioe, Edge, Input, Output, PushPull};
 use hal::interrupt;
 use hal::pac;
-use hal::pac::NVIC;
 use hal::prelude::*;
 
 type LedPin = gpioe::PE9<Output<PushPull>>;

src/i2c.rs

@@ -116,7 +116,7 @@ impl<I2C, SCL, SDA> I2c<I2C, (SCL, SDA)> {
         SCL: SclPin<I2C>,
         SDA: SdaPin<I2C>,
     {
-        crate::assert!(*freq.integer() <= 1_000_000);
+        crate::assert!(freq.integer() <= 1_000_000);
 
         I2C::enable_clock(apb1);
 
@@ -129,16 +129,16 @@ impl<I2C, SCL, SDA> I2c<I2C, (SCL, SDA)> {
         // t_SYNC1 + t_SYNC2 > 4 * t_I2CCLK
         // t_SCL ~= t_SYNC1 + t_SYNC2 + t_SCLL + t_SCLH
         let i2cclk = I2C::clock(&clocks).0;
-        let ratio = i2cclk / *freq.integer() - 4;
-        let (presc, scll, sclh, sdadel, scldel) = if *freq.integer() >= 100_000 {
+        let ratio = i2cclk / freq.integer() - 4;
+        let (presc, scll, sclh, sdadel, scldel) = if freq.integer() >= 100_000 {
             // fast-mode or fast-mode plus
             // here we pick SCLL + 1 = 2 * (SCLH + 1)
             let presc = ratio / 387;
 
             let sclh = ((ratio / (presc + 1)) - 3) / 3;
             let scll = 2 * (sclh + 1) - 1;
 
-            let (sdadel, scldel) = if *freq.integer() > 400_000 {
+            let (sdadel, scldel) = if freq.integer() > 400_000 {
                 // fast-mode plus
                 let sdadel = 0;
                 let scldel = i2cclk / 4_000_000 / (presc + 1) - 1;

src/pwm.rs

@@ -285,7 +285,7 @@ macro_rules! pwm_timer_private {
             // It might make sense to move into the clocks as a crate-only property.
             // TODO: ppre1 is used in timer.rs (never ppre2), should this be dynamic?
             let clock_freq = clocks.$pclkz().0 * if clocks.ppre1() == 1 { 1 } else { 2 };
-            let prescale_factor = clock_freq / res as u32 / *freq.integer();
+            let prescale_factor = clock_freq / res as u32 / freq.integer();
             // NOTE(write): uses all bits of this register.
             tim.psc.write(|w| w.psc().bits(prescale_factor as u16 - 1));
 

src/rcc.rs

@@ -343,7 +343,7 @@ impl CFGR {
     /// Panics if conversion from `Megahertz` to `Hertz` produces a value greater then `u32::MAX`.
     pub fn use_hse(mut self, freq: Megahertz) -> Self {
         let freq: Hertz = crate::expect!(freq.try_into(), "ConversionError");
-        self.hse = Some(*freq.integer());
+        self.hse = Some(freq.integer());
         self
     }
 
@@ -376,7 +376,7 @@ impl CFGR {
     /// Panics if conversion from `Megahertz` to `Hertz` produces a value greater then `u32::MAX`.
     pub fn hclk(mut self, freq: Megahertz) -> Self {
         let freq: Hertz = crate::expect!(freq.try_into(), "ConversionError");
-        self.hclk = Some(*freq.integer());
+        self.hclk = Some(freq.integer());
         self
     }
 
@@ -392,7 +392,7 @@ impl CFGR {
     /// Panics if conversion from `Megahertz` to `Hertz` produces a value greater then `u32::MAX`.
     pub fn pclk1(mut self, freq: Megahertz) -> Self {
         let freq: Hertz = crate::expect!(freq.try_into(), "ConversionError");
-        self.pclk1 = Some(*freq.integer());
+        self.pclk1 = Some(freq.integer());
         self
     }
 
@@ -414,7 +414,7 @@ impl CFGR {
     /// Panics if conversion from `Megahertz` to `Hertz` produces a value greater then `u32::MAX`.
     pub fn pclk2(mut self, freq: Megahertz) -> Self {
         let freq: Hertz = crate::expect!(freq.try_into(), "ConversionError");
-        self.pclk2 = Some(*freq.integer());
+        self.pclk2 = Some(freq.integer());
         self
     }
 
@@ -439,7 +439,7 @@ impl CFGR {
     /// Panics if conversion from `Megahertz` to `Hertz` produces a value greater then `u32::MAX`.
     pub fn sysclk(mut self, freq: Megahertz) -> Self {
         let freq: Hertz = crate::expect!(freq.try_into(), "ConversionError");
-        self.sysclk = Some(*freq.integer());
+        self.sysclk = Some(freq.integer());
         self
     }
 

src/serial.rs

@@ -128,7 +128,7 @@ macro_rules! hal {
                     apb.rstr().modify(|_, w| w.$usartXrst().set_bit());
                     apb.rstr().modify(|_, w| w.$usartXrst().clear_bit());
 
-                    let brr = clocks.$pclkX().0 / *baud_rate.integer();
+                    let brr = clocks.$pclkX().0 / baud_rate.integer();
                     crate::assert!(brr >= 16, "impossible baud rate");
                     // NOTE(write): uses all bits of this register.
                     usart.brr.write(|w| unsafe { w.bits(brr) });

src/spi.rs

@@ -503,7 +503,7 @@ macro_rules! hal {
 
                 fn compute_baud_rate(clocks: Hertz, freq: Hertz) -> spi1::cr1::BR_A {
                     use spi1::cr1::BR_A;
-                    match clocks.0 / *freq.integer() {
+                    match clocks.0 / freq.integer() {
                         0 => crate::unreachable!(),
                         1..=2 => BR_A::DIV2,
                         3..=5 => BR_A::DIV4,

src/timer.rs

@@ -95,7 +95,7 @@ macro_rules! hal {
                 {
                     self.stop();
 
-                    let frequency = *timeout.into().integer();
+                    let frequency = timeout.into().integer();
                     let timer_clock = $TIMX::get_clk(&self.clocks);
                     let ticks = timer_clock.0 * if self.clocks.ppre1() == 1 { 1 } else { 2 }
                         / frequency;

src/watchdog.rs

@@ -96,7 +96,7 @@ impl WatchdogEnable for IndependentWatchDog {
     type Time = Milliseconds;
 
     fn start<T: Into<Self::Time>>(&mut self, period: T) {
-        self.setup(*period.into().integer());
+        self.setup(period.into().integer());
 
         self.iwdg.kr.write(|w| w.key().start());
     }