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Define pin type aliases directly under gpio module #257

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3 changes: 3 additions & 0 deletions CHANGELOG.md
Original file line number Diff line number Diff line change
Expand Up @@ -16,6 +16,8 @@ and this project adheres to [Semantic Versioning](http://semver.org/).
### Changed

- `PXx` struct (representing a generic GPIO pin) implements `Send` and `Sync` [#251]
- Each pin aliases (`PA0`, `PA1`, ..) are defined under `gpio` module directly.
Re-export from gpio port sub-modules are provided for compatibility. [#257]

### Breaking Changes

Expand Down Expand Up @@ -351,6 +353,7 @@ let clocks = rcc
[defmt]: https://github.com/knurling-rs/defmt
[filter]: https://defmt.ferrous-systems.com/filtering.html

[#257]: https://github.com/stm32-rs/stm32f3xx-hal/pull/257
[#255]: https://github.com/stm32-rs/stm32f3xx-hal/pull/255
[#252]: https://github.com/stm32-rs/stm32f3xx-hal/pull/252
[#247]: https://github.com/stm32-rs/stm32f3xx-hal/pull/247
Expand Down
23 changes: 11 additions & 12 deletions examples/gpio_interrupts.rs
Original file line number Diff line number Diff line change
@@ -1,24 +1,23 @@
#![no_main]
#![no_std]

use panic_semihosting as _;
use core::cell::RefCell;

use stm32f3xx_hal as hal;
use panic_semihosting as _;

use core::cell::RefCell;
use cortex_m::asm;
use cortex_m::interrupt::Mutex;
use cortex_m::peripheral::NVIC;
use cortex_m::{asm, interrupt::Mutex, peripheral::NVIC};
use cortex_m_rt::entry;
use hal::gpio::{gpioa, gpioe, Edge, Input, Output, PushPull};
use hal::interrupt;
use hal::pac;
use hal::prelude::*;

type LedPin = gpioe::PE9<Output<PushPull>>;
use stm32f3xx_hal::{
gpio::{self, Edge, Input, Output, PushPull},
interrupt, pac,
prelude::*,
};

type LedPin = gpio::PE9<Output<PushPull>>;
static LED: Mutex<RefCell<Option<LedPin>>> = Mutex::new(RefCell::new(None));

type ButtonPin = gpioa::PA0<Input>;
type ButtonPin = gpio::PA0<Input>;
static BUTTON: Mutex<RefCell<Option<ButtonPin>>> = Mutex::new(RefCell::new(None));

// When the user button is pressed. The north LED will toggle.
Expand Down
11 changes: 3 additions & 8 deletions examples/serial_echo_rtic.rs
Original file line number Diff line number Diff line change
Expand Up @@ -9,21 +9,16 @@ mod app {
use rtt_target::{rprintln, rtt_init_print};
use stm32f3xx_hal::{
gpio::{self, Output, PushPull, AF7},
pac,
prelude::*,
serial::{Event, Serial},
};

#[monotonic(binds = SysTick, default = true)]
type DwtMono = DwtSystick<48_000_000>;

type SerialType = Serial<
stm32f3xx_hal::pac::USART1,
(
gpio::gpioa::PA9<AF7<PushPull>>,
gpio::gpioa::PA10<AF7<PushPull>>,
),
>;
type DirType = stm32f3xx_hal::gpio::gpioe::PE13<Output<PushPull>>;
type SerialType = Serial<pac::USART1, (gpio::PA9<AF7<PushPull>>, gpio::PA10<AF7<PushPull>>)>;
type DirType = gpio::PE13<Output<PushPull>>;

#[shared]
struct Shared {}
Expand Down
130 changes: 62 additions & 68 deletions src/adc.rs
Original file line number Diff line number Diff line change
Expand Up @@ -9,30 +9,24 @@
//!
//! [examples/adc.rs]: https://github.com/stm32-rs/stm32f3xx-hal/blob/v0.7.0/examples/adc.rs

use crate::{
gpio::Analog,
rcc::{Clocks, AHB},
};
use cortex_m::asm;
use embedded_hal::adc::{Channel, OneShot};

use crate::{
gpio::{gpioa, gpiob, gpioc},
pac::{ADC1, ADC1_2, ADC2},
gpio::{self, Analog},
pac::{adc1::cfgr::ALIGN_A, adc1_2::ccr::CKMODE_A, ADC1, ADC1_2, ADC2},
rcc::{Clocks, AHB},
};
use stm32f3::stm32f303::{adc1::cfgr::ALIGN_A, adc1_2::ccr::CKMODE_A};
const MAX_ADVREGEN_STARTUP_US: u32 = 10;

#[cfg(any(
feature = "stm32f303xb",
feature = "stm32f303xc",
feature = "stm32f303xd",
feature = "stm32f303xe",
))]
use crate::{
gpio::{gpiod, gpioe, gpiof},
pac::{ADC3, ADC3_4, ADC4},
};
use crate::pac::{ADC3, ADC3_4, ADC4};

const MAX_ADVREGEN_STARTUP_US: u32 = 10;

/// Analog Digital Converter Peripheral
// TODO: Remove `pub` from the register block once all functionalities are implemented.
Expand Down Expand Up @@ -174,21 +168,21 @@ macro_rules! adc_pins {

#[cfg(feature = "stm32f303")]
adc_pins!(ADC1,
gpioa::PA0<Analog> => 1,
gpioa::PA1<Analog> => 2,
gpioa::PA2<Analog> => 3,
gpioa::PA3<Analog> => 4,
gpioc::PC0<Analog> => 6,
gpioc::PC1<Analog> => 7,
gpioc::PC2<Analog> => 8,
gpioc::PC3<Analog> => 9,
gpio::PA0<Analog> => 1,
gpio::PA1<Analog> => 2,
gpio::PA2<Analog> => 3,
gpio::PA3<Analog> => 4,
gpio::PC0<Analog> => 6,
gpio::PC1<Analog> => 7,
gpio::PC2<Analog> => 8,
gpio::PC3<Analog> => 9,
);

#[cfg(any(feature = "stm32f303x6", feature = "stm32f303x8"))]
adc_pins!(ADC1,
gpiob::PB0<Analog> => 11,
gpiob::PB1<Analog> => 12,
gpiob::PB13<Analog> => 13,
gpio::PB0<Analog> => 11,
gpio::PB1<Analog> => 12,
gpio::PB13<Analog> => 13,
);

#[cfg(any(
Expand All @@ -198,33 +192,33 @@ adc_pins!(ADC1,
feature = "stm32f303xe",
))]
adc_pins!(ADC1,
gpiof::PF4<Analog> => 5,
gpiof::PF2<Analog> => 10,
gpio::PF4<Analog> => 5,
gpio::PF2<Analog> => 10,
);

// # ADC2 Pin/Channel mapping
// ## f303

#[cfg(feature = "stm32f303")]
adc_pins!(ADC2,
gpioa::PA4<Analog> => 1,
gpioa::PA5<Analog> => 2,
gpioa::PA6<Analog> => 3,
gpioa::PA7<Analog> => 4,
gpioc::PC4<Analog> => 5,
gpioc::PC0<Analog> => 6,
gpioc::PC1<Analog> => 7,
gpioc::PC2<Analog> => 8,
gpioc::PC3<Analog> => 9,
gpioc::PC5<Analog> => 11,
gpiob::PB2<Analog> => 12,
gpio::PA4<Analog> => 1,
gpio::PA5<Analog> => 2,
gpio::PA6<Analog> => 3,
gpio::PA7<Analog> => 4,
gpio::PC4<Analog> => 5,
gpio::PC0<Analog> => 6,
gpio::PC1<Analog> => 7,
gpio::PC2<Analog> => 8,
gpio::PC3<Analog> => 9,
gpio::PC5<Analog> => 11,
gpio::PB2<Analog> => 12,
);

#[cfg(any(feature = "stm32f303x6", feature = "stm32f303x8"))]
adc_pins!(ADC2,
gpiob::PB12<Analog> => 13,
gpiob::PB14<Analog> => 14,
gpiob::PB15<Analog> => 15,
gpio::PB12<Analog> => 13,
gpio::PB14<Analog> => 14,
gpio::PB15<Analog> => 15,
);

#[cfg(any(
Expand All @@ -234,7 +228,7 @@ adc_pins!(ADC2,
feature = "stm32f303xe",
))]
adc_pins!(ADC2,
gpiof::PF2<Analog> => 10,
gpio::PF2<Analog> => 10,
);

// # ADC3 Pin/Channel mapping
Expand All @@ -247,22 +241,22 @@ adc_pins!(ADC2,
feature = "stm32f303xe",
))]
adc_pins!(ADC3,
gpiob::PB1<Analog> => 1,
gpioe::PE9<Analog> => 2,
gpioe::PE13<Analog> => 3,
gpio::PB1<Analog> => 1,
gpio::PE9<Analog> => 2,
gpio::PE13<Analog> => 3,
// There is no ADC3 Channel #4
gpiob::PB13<Analog> => 5,
gpioe::PE8<Analog> => 6,
gpiod::PD10<Analog> => 7,
gpiod::PD11<Analog> => 8,
gpiod::PD12<Analog> => 9,
gpiod::PD13<Analog> => 10,
gpiod::PD14<Analog> => 11,
gpiob::PB0<Analog> => 12,
gpioe::PE7<Analog> => 13,
gpioe::PE10<Analog> => 14,
gpioe::PE11<Analog> => 15,
gpioe::PE12<Analog> => 16,
gpio::PB13<Analog> => 5,
gpio::PE8<Analog> => 6,
gpio::PD10<Analog> => 7,
gpio::PD11<Analog> => 8,
gpio::PD12<Analog> => 9,
gpio::PD13<Analog> => 10,
gpio::PD14<Analog> => 11,
gpio::PB0<Analog> => 12,
gpio::PE7<Analog> => 13,
gpio::PE10<Analog> => 14,
gpio::PE11<Analog> => 15,
gpio::PE12<Analog> => 16,
);

// # ADC4 Pin/Channel mapping
Expand All @@ -275,19 +269,19 @@ adc_pins!(ADC3,
feature = "stm32f303xe",
))]
adc_pins!(ADC4,
gpioe::PE14<Analog> => 1,
gpioe::PE15<Analog> => 2,
gpiob::PB12<Analog> => 3,
gpiob::PB14<Analog> => 4,
gpiob::PB15<Analog> => 5,
gpioe::PE8<Analog> => 6,
gpiod::PD10<Analog> => 7,
gpiod::PD11<Analog> => 8,
gpiod::PD12<Analog> => 9,
gpiod::PD13<Analog> => 10,
gpiod::PD14<Analog> => 11,
gpiod::PD8<Analog> => 12,
gpiod::PD9<Analog> => 13,
gpio::PE14<Analog> => 1,
gpio::PE15<Analog> => 2,
gpio::PB12<Analog> => 3,
gpio::PB14<Analog> => 4,
gpio::PB15<Analog> => 5,
gpio::PE8<Analog> => 6,
gpio::PD10<Analog> => 7,
gpio::PD11<Analog> => 8,
gpio::PD12<Analog> => 9,
gpio::PD13<Analog> => 10,
gpio::PD14<Analog> => 11,
gpio::PD8<Analog> => 12,
gpio::PD9<Analog> => 13,
);

// Abstract implementation of ADC functionality
Expand Down
77 changes: 41 additions & 36 deletions src/gpio.rs
Original file line number Diff line number Diff line change
Expand Up @@ -755,42 +755,54 @@ macro_rules! gpio {
gpio_mapped: $gpioy:ident,
iopen: $iopxen:ident,
ioprst: $iopxrst:ident,
partially_erased_pin: $PXx:ty,
partially_erased_pin: $PXx:ident,
pins: [$(
$i:literal => (
$PXi:ty, $pxi:ident, $MODE:ty, $AFR:ident, [$($IntoAfi:ident),*],
$PXi:ident, $pxi:ident, $MODE:ty, $AFR:ident, [$($IntoAfi:ident),*],
),
)+],
}) => {
paste::paste!{
paste::paste! {
#[doc = "GPIO port " $GPIOX " (type state)"]
pub struct $Gpiox;
}

impl private::Gpio for $Gpiox {
type Reg = crate::pac::$gpioy::RegisterBlock;
impl private::Gpio for $Gpiox {
type Reg = crate::pac::$gpioy::RegisterBlock;

#[inline(always)]
fn ptr(&self) -> *const Self::Reg {
crate::pac::$GPIOX::ptr()
#[inline(always)]
fn ptr(&self) -> *const Self::Reg {
crate::pac::$GPIOX::ptr()
}

#[inline(always)]
fn port_index(&self) -> u8 {
$port_index
}
}

#[inline(always)]
fn port_index(&self) -> u8 {
$port_index
impl marker::Gpio for $Gpiox {}

impl marker::GpioStatic for $Gpiox {
type MODER = $gpiox::MODER;
type OTYPER = $gpiox::OTYPER;
type OSPEEDR = $gpiox::OSPEEDR;
type PUPDR = $gpiox::PUPDR;
}
}

impl marker::Gpio for $Gpiox {}
$(
#[doc = "Pin " $PXi]
pub type $PXi<Mode> = Pin<$Gpiox, U<$i>, Mode>;

impl marker::GpioStatic for $Gpiox {
type MODER = $gpiox::MODER;
type OTYPER = $gpiox::OTYPER;
type OSPEEDR = $gpiox::OSPEEDR;
type PUPDR = $gpiox::PUPDR;
}
$(
impl<Mode> marker::$IntoAfi for $PXi<Mode> {
type AFR = $gpiox::$AFR;
}
)*
)+

#[doc = "Partially erased pin for " $GPIOX]
pub type $PXx<Mode> = Pin<$Gpiox, Ux, Mode>;

paste::paste!{
#[doc = "All Pins and associated registers for GPIO port " $GPIOX]
pub mod $gpiox {
use core::marker::PhantomData;
Expand All @@ -800,14 +812,21 @@ macro_rules! gpio {
rcc::AHB,
};

use super::{marker, Afr, $Gpiox, GpioExt, Moder, Ospeedr, Otyper, Pin, Pupdr, U, Ux};
use super::{Afr, $Gpiox, GpioExt, Moder, Ospeedr, Otyper, Pupdr, U};

#[allow(unused_imports)]
use super::{
Input, Output, Analog, PushPull, OpenDrain,
AF0, AF1, AF2, AF3, AF4, AF5, AF6, AF7, AF8, AF9, AF10, AF11, AF12, AF13, AF14, AF15,
};

pub use super::{
$PXx,
$(
$PXi,
)+
};

/// GPIO parts
pub struct Parts {
/// Opaque AFRH register
Expand Down Expand Up @@ -923,20 +942,6 @@ macro_rules! gpio {
fn pull_down { PULLDOWN }
}
}

/// Partially erased pin
pub type $PXx<Mode> = Pin<$Gpiox, Ux, Mode>;

$(
#[doc = "Pin " $PXi]
pub type $PXi<Mode> = Pin<$Gpiox, U<$i>, Mode>;

$(
impl<Mode> marker::$IntoAfi for $PXi<Mode> {
type AFR = $AFR;
}
)*
)+
}
}
};
Expand Down