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Take a reference to CoreClocks in USB constructors
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Instead of just hclk. This is more consistent and likely useful be able to
access other clocks in future
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richardeoin committed Mar 12, 2021
1 parent 4c8856c commit b25068a
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Showing 3 changed files with 17 additions and 17 deletions.
4 changes: 2 additions & 2 deletions examples/usb_passthrough.rs
Original file line number Diff line number Diff line change
Expand Up @@ -46,7 +46,7 @@ fn main() -> ! {
gpiob.pb14.into_alternate_af12(),
gpiob.pb15.into_alternate_af12(),
ccdr.peripheral.USB1OTG,
ccdr.clocks.hclk(),
&ccdr.clocks,
);

let usb2 = USB2::new(
Expand All @@ -56,7 +56,7 @@ fn main() -> ! {
gpioa.pa11.into_alternate_af10(),
gpioa.pa12.into_alternate_af10(),
ccdr.peripheral.USB2OTG,
ccdr.clocks.hclk(),
&ccdr.clocks,
);

// Port 1
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2 changes: 1 addition & 1 deletion examples/usb_serial.rs
Original file line number Diff line number Diff line change
Expand Up @@ -60,7 +60,7 @@ fn main() -> ! {
pin_dm,
pin_dp,
ccdr.peripheral.USB1OTG,
ccdr.clocks.hclk(),
&ccdr.clocks,
);

let usb_bus = UsbBus::new(usb, unsafe { &mut EP_MEMORY });
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28 changes: 14 additions & 14 deletions src/usb_hs.rs
Original file line number Diff line number Diff line change
Expand Up @@ -41,9 +41,9 @@ impl USB1 {
_pin_dm: PB14<Alternate<AF12>>,
_pin_dp: PB15<Alternate<AF12>>,
prec: rcc::rec::Usb1Otg,
hclk: Hertz,
clocks: &rcc::CoreClocks,
) -> Self {
Self::new_unchecked(usb_global, usb_device, usb_pwrclk, prec, hclk)
Self::new_unchecked(usb_global, usb_device, usb_pwrclk, prec, clocks)
}
#[cfg(feature = "rm0455")]
pub fn new(
Expand All @@ -53,23 +53,23 @@ impl USB1 {
_pin_dm: PA11<Alternate<AF10>>,
_pin_dp: PA12<Alternate<AF10>>,
prec: rcc::rec::Usb1Otg,
hclk: Hertz,
clocks: &rcc::CoreClocks,
) -> Self {
Self::new_unchecked(usb_global, usb_device, usb_pwrclk, prec, hclk)
Self::new_unchecked(usb_global, usb_device, usb_pwrclk, prec, clocks)
}
pub fn new_unchecked(
usb_global: stm32::OTG1_HS_GLOBAL,
usb_device: stm32::OTG1_HS_DEVICE,
usb_pwrclk: stm32::OTG1_HS_PWRCLK,
prec: rcc::rec::Usb1Otg,
hclk: Hertz,
clocks: &rcc::CoreClocks,
) -> Self {
USB1 {
usb_global,
usb_device,
usb_pwrclk,
prec,
hclk,
hclk: clocks.hclk(),
}
}
}
Expand All @@ -91,23 +91,23 @@ impl USB2 {
_pin_dm: PA11<Alternate<AF10>>,
_pin_dp: PA12<Alternate<AF10>>,
prec: rcc::rec::Usb2Otg,
hclk: Hertz,
clocks: &rcc::CoreClocks,
) -> Self {
Self::new_unchecked(usb_global, usb_device, usb_pwrclk, prec, hclk)
Self::new_unchecked(usb_global, usb_device, usb_pwrclk, prec, clocks)
}
pub fn new_unchecked(
usb_global: stm32::OTG2_HS_GLOBAL,
usb_device: stm32::OTG2_HS_DEVICE,
usb_pwrclk: stm32::OTG2_HS_PWRCLK,
prec: rcc::rec::Usb2Otg,
hclk: Hertz,
clocks: &rcc::CoreClocks,
) -> Self {
USB2 {
usb_global,
usb_device,
usb_pwrclk,
prec,
hclk,
hclk: clocks.hclk(),
}
}
}
Expand Down Expand Up @@ -223,23 +223,23 @@ impl USB1_ULPI {
_ulpi_d6: PB13<Alternate<AF10>>,
_ulpi_d7: PB5<Alternate<AF10>>,
prec: rcc::rec::Usb1Otg,
hclk: Hertz,
clocks: &rcc::CoreClocks,
) -> Self {
Self::new_unchecked(usb_global, usb_device, usb_pwrclk, prec, hclk)
Self::new_unchecked(usb_global, usb_device, usb_pwrclk, prec, clocks)
}
pub fn new_unchecked(
usb_global: stm32::OTG1_HS_GLOBAL,
usb_device: stm32::OTG1_HS_DEVICE,
usb_pwrclk: stm32::OTG1_HS_PWRCLK,
prec: rcc::rec::Usb1Otg,
hclk: Hertz,
clocks: &rcc::CoreClocks,
) -> Self {
USB1_ULPI {
usb_global,
usb_device,
usb_pwrclk,
prec,
hclk,
hclk: clocks.hclk(),
}
}
}
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