x86_64: Move CpuInfo to common file

src/imp/atomic128/detect/common.rs

@@ -0,0 +1,22 @@
+#[derive(Clone, Copy)]
+pub(crate) struct CpuInfo(u32);
+
+impl CpuInfo {
+    #[inline]
+    fn set(&mut self, bit: u32) {
+        self.0 = set(self.0, bit);
+    }
+    #[inline]
+    fn test(self, bit: u32) -> bool {
+        test(self.0, bit)
+    }
+}
+
+#[inline]
+fn set(x: u32, bit: u32) -> u32 {
+    x | 1 << bit
+}
+#[inline]
+fn test(x: u32, bit: u32) -> bool {
+    x & (1 << bit) != 0
+}

src/imp/atomic128/detect/x86_64.rs

@@ -10,30 +10,20 @@
     allow(dead_code)
 )]
 
+include!("common.rs");
+
 #[cfg(not(portable_atomic_no_asm))]
 use core::arch::asm;
 use core::{
     arch::x86_64::CpuidResult,
     sync::atomic::{AtomicU32, Ordering},
 };
 
-#[derive(Clone, Copy)]
-pub(crate) struct CpuInfo(u32);
-
 impl CpuInfo {
     const INIT: u32 = 0;
     const HAS_CMPXCHG16B: u32 = 1;
     const HAS_VMOVDQA_ATOMIC: u32 = 2;
 
-    #[inline]
-    fn set(&mut self, bit: u32) {
-        self.0 = set(self.0, bit);
-    }
-    #[inline]
-    fn test(self, bit: u32) -> bool {
-        test(self.0, bit)
-    }
-
     #[allow(clippy::unused_self)]
     #[inline]
     pub(crate) fn has_cmpxchg16b(self) -> bool {
@@ -56,15 +46,6 @@ impl CpuInfo {
     }
 }
 
-#[inline]
-fn set(x: u32, bit: u32) -> u32 {
-    x | 1 << bit
-}
-#[inline]
-fn test(x: u32, bit: u32) -> bool {
-    x & (1 << bit) != 0
-}
-
 // Workaround for https://github.com/rust-lang/rust/issues/101346
 // It is not clear if our use cases are affected, but we implement this just in case.
 //