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riscv64: Support 128-bit atomics (Zacas extension)
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| Original file line number | Diff line number | Diff line change |
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| // SPDX-License-Identifier: Apache-2.0 OR MIT | ||
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| // Run-time CPU feature detection on riscv64 Linux/Android by using riscv_hwprobe. | ||
| // | ||
| // On RISC-V, detection using auxv only supports single-character extensions. | ||
| // | ||
| // Refs: | ||
| // - https://github.com/torvalds/linux/blob/v6.10/Documentation/arch/riscv/hwprobe.rst | ||
| // - https://github.com/golang/sys/commit/3283fc3f6160baf63bec24fbaa24e094e9ff6daf | ||
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| include!("common.rs"); | ||
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| // core::ffi::c_* (except c_void) requires Rust 1.64, libc will soon require Rust 1.47 | ||
| #[allow(non_camel_case_types, non_upper_case_globals)] | ||
| mod ffi { | ||
| pub(crate) use super::c_types::c_long; | ||
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| extern "C" { | ||
| // https://man7.org/linux/man-pages/man2/syscall.2.html | ||
| // https://github.com/rust-lang/libc/blob/0.2.139/src/unix/linux_like/android/mod.rs#L3215 | ||
| // https://github.com/rust-lang/libc/blob/0.2.139/src/unix/linux_like/linux/mod.rs#L4080 | ||
| pub(crate) fn syscall(number: c_long, ...) -> c_long; | ||
| } | ||
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| // https://github.com/torvalds/linux/blob/v6.10/arch/riscv/include/uapi/asm/hwprobe.h | ||
| #[derive(Copy, Clone)] | ||
| #[repr(C)] | ||
| pub(crate) struct riscv_hwprobe { | ||
| pub(crate) key: i64, | ||
| pub(crate) value: u64, | ||
| } | ||
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| pub(crate) const __NR_riscv_hwprobe: c_long = 258; | ||
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| // https://github.com/torvalds/linux/blob/v6.10/arch/riscv/include/uapi/asm/hwprobe.h | ||
| pub(crate) const RISCV_HWPROBE_KEY_IMA_EXT_0: i64 = 4; | ||
| pub(crate) const RISCV_HWPROBE_EXT_ZACAS: u64 = 1 << 34; | ||
| } | ||
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| fn riscv_hwprobe(out: &mut ffi::riscv_hwprobe, flags: usize) -> bool { | ||
| // SAFETY: We've passed the valid pointer and length. | ||
| unsafe { | ||
| ffi::syscall( | ||
| ffi::__NR_riscv_hwprobe, | ||
| out as *mut ffi::riscv_hwprobe, | ||
| 1_usize, | ||
| 0_usize, | ||
| 0_usize, | ||
| flags, | ||
| 0_usize, | ||
| ) == 0 | ||
| } | ||
| } | ||
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| #[cold] | ||
| fn _detect(info: &mut CpuInfo) { | ||
| let mut out = ffi::riscv_hwprobe { key: ffi::RISCV_HWPROBE_KEY_IMA_EXT_0, value: 0 }; | ||
| if riscv_hwprobe(&mut out, 0) { | ||
| if out.key != -1 { | ||
| if out.value & ffi::RISCV_HWPROBE_EXT_ZACAS != 0 { | ||
| info.set(CpuInfo::HAS_ZACAS); | ||
| } | ||
| } | ||
| } | ||
| } | ||
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| #[allow( | ||
| clippy::alloc_instead_of_core, | ||
| clippy::std_instead_of_alloc, | ||
| clippy::std_instead_of_core, | ||
| clippy::undocumented_unsafe_blocks, | ||
| clippy::wildcard_imports | ||
| )] | ||
| #[cfg(test)] | ||
| mod tests { | ||
| use super::*; | ||
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| // Static assertions for FFI bindings. | ||
| // This checks that FFI bindings defined in this crate, FFI bindings defined | ||
| // in libc, and FFI bindings generated for the platform's latest header file | ||
| // using bindgen have compatible signatures (or the same values if constants). | ||
| // Since this is static assertion, we can detect problems with | ||
| // `cargo check --tests --target <target>` run in CI (via TESTS=1 build.sh) | ||
| // without actually running tests on these platforms. | ||
| // See also tools/codegen/src/ffi.rs. | ||
| // TODO(codegen): auto-generate this test | ||
| #[allow( | ||
| clippy::cast_possible_wrap, | ||
| clippy::cast_sign_loss, | ||
| clippy::no_effect_underscore_binding | ||
| )] | ||
| const _: fn() = || { | ||
| use test_helper::sys; | ||
| // TODO: syscall,riscv_hwprobe | ||
| // static_assert!(ffi::__NR_riscv_hwprobe == libc::__NR_riscv_hwprobe); | ||
| static_assert!(ffi::__NR_riscv_hwprobe == sys::__NR_riscv_hwprobe as ffi::c_long); | ||
| // static_assert!(ffi::RISCV_HWPROBE_KEY_IMA_EXT_0 == libc::RISCV_HWPROBE_KEY_IMA_EXT_0); | ||
| static_assert!(ffi::RISCV_HWPROBE_KEY_IMA_EXT_0 == sys::RISCV_HWPROBE_KEY_IMA_EXT_0 as i64); | ||
| // static_assert!(ffi::RISCV_HWPROBE_EXT_ZACAS == libc::RISCV_HWPROBE_EXT_ZACAS); | ||
| static_assert!(ffi::RISCV_HWPROBE_EXT_ZACAS == sys::RISCV_HWPROBE_EXT_ZACAS); | ||
| }; | ||
| } |
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