Update comments

- Use aarch64 -> AArch64, ARM -> Arm, to match Arm docs.
- Update references.

.github/workflows/ci.yml

@@ -145,7 +145,7 @@ jobs:
           rm -rf -- qemu
           # TODO: retry on failure
           # https://github.com/taiki-e/dockerfiles/pkgs/container/qemu-user
-          docker create --name qemu-user ghcr.io/taiki-e/qemu-user:8.1 # TODO: "qemu-armeb: Error mapping file: Operation not permitted" error in 8.2/9.0
+          docker create --name qemu-user ghcr.io/taiki-e/qemu-user:8.1 # TODO: "qemu-armeb: Error mapping file: Operation not permitted" error in 8.2-9.1
           mkdir -p -- qemu-user
           docker cp -- qemu-user:/usr/bin qemu-user/bin
           docker rm -f -- qemu-user >/dev/null

CHANGELOG.md

@@ -34,7 +34,7 @@ Note: In this file, do not use the hard wrap in the middle of a sentence for com
 
 ## [0.1.9] - 2024-04-21
 
-- Add `trap-hlt` feature to use `HLT` instruction on ARM A+R profile. See the [documentation](https://github.com/taiki-e/semihosting#optional-features-trap-hlt) for details.
+- Add `trap-hlt` feature to use `HLT` instruction on Arm A+R profile. See the [documentation](https://github.com/taiki-e/semihosting#optional-features-trap-hlt) for details.
 
 ## [0.1.8] - 2024-04-21
 

Cargo.toml

@@ -9,13 +9,13 @@ keywords = ["qemu"]
 categories = ["embedded", "hardware-support", "no-std", "no-std::no-alloc"]
 exclude = ["/.*", "/tools", "/target-specs"]
 description = """
-Semihosting for AArch64, ARM, RISC-V, MIPS32, MIPS64, and Xtensa.
+Semihosting for AArch64, Arm, RISC-V, MIPS32, MIPS64, and Xtensa.
 """
 
 [package.metadata.docs.rs]
 # NB: sync with env.TEST_FEATURES in .github/workflows/ci.yml
 features = ["alloc", "stdio", "fs", "args", "time"]
-# Building documentation on any architectures that support ARM semihosting with
+# Building documentation on any architectures that support Arm semihosting with
 # the above cfg will show all APIs with proper doc(cfg).
 targets = ["aarch64-unknown-linux-gnu"]
 
@@ -77,7 +77,7 @@ backtrace = ["stdio", "unwinding", "unwinding/hide-trace"]
 # See readme for details.
 portable-atomic = ["dep:portable-atomic"]
 
-# ARM-specific: Use HLT instruction on A+R profile.
+# Arm-specific: Use HLT instruction on A+R profile.
 #
 # See readme for details.
 trap-hlt = []

README.md

@@ -7,9 +7,9 @@
 [![github actions](https://img.shields.io/github/actions/workflow/status/taiki-e/semihosting/ci.yml?branch=main&style=flat-square&logo=github)](https://github.com/taiki-e/semihosting/actions)
 
 <!-- tidy:crate-doc:start -->
-Semihosting for AArch64, ARM, RISC-V, MIPS32, MIPS64, and Xtensa.
+Semihosting for AArch64, Arm, RISC-V, MIPS32, MIPS64, and Xtensa.
 
-This library provides access to semihosting, a mechanism for programs running on the real or virtual (e.g., QEMU) target to communicate with I/O facilities on the host system. See the [ARM documentation](https://github.com/ARM-software/abi-aa/blob/HEAD/semihosting/semihosting.rst) for more information on semihosting.
+This library provides access to semihosting, a mechanism for programs running on the real or virtual (e.g., QEMU) target to communicate with I/O facilities on the host system. See the [Arm documentation](https://github.com/ARM-software/abi-aa/blob/2024Q3/semihosting/semihosting.rst) for more information on semihosting.
 
 APIs are categorized into the following four types:
 
@@ -38,9 +38,9 @@ The following target architectures are supported:
 
 | target_arch | Specification | `semihosting::sys` module | Note |
 | ----------- | ------------- | ------------------------- | ---- |
-| aarch64 | [Semihosting for AArch32 and AArch64](https://github.com/ARM-software/abi-aa/blob/HEAD/semihosting/semihosting.rst) | `sys::arm_compat` | |
-| arm | [Semihosting for AArch32 and AArch64](https://github.com/ARM-software/abi-aa/blob/HEAD/semihosting/semihosting.rst) | `sys::arm_compat` | use `SVC` on A+R profile by default based on ARM's recommendation but it can be changed by [`trap-hlt` feature](#optional-features-trap-hlt). |
-| riscv32/riscv64 | [RISC-V Semihosting](https://github.com/riscv-non-isa/riscv-semihosting/blob/HEAD/riscv-semihosting.adoc) | `sys::arm_compat` | |
+| aarch64 | [Semihosting for AArch32 and AArch64](https://github.com/ARM-software/abi-aa/blob/2024Q3/semihosting/semihosting.rst) | `sys::arm_compat` | |
+| arm | [Semihosting for AArch32 and AArch64](https://github.com/ARM-software/abi-aa/blob/2024Q3/semihosting/semihosting.rst) | `sys::arm_compat` | use `SVC` on A+R profile by default based on Arm's recommendation but it can be changed by [`trap-hlt` feature](#optional-features-trap-hlt). |
+| riscv32/riscv64 | [RISC-V Semihosting](https://github.com/riscv-non-isa/riscv-semihosting/blob/0.5/riscv-semihosting.adoc) | `sys::arm_compat` | |
 | xtensa | [OpenOCD Semihosting](https://github.com/espressif/openocd-esp32/blob/HEAD/src/target/espressif/esp_xtensa_semihosting.c) | `sys::arm_compat` | requires [`openocd-semihosting` feature](#optional-features-openocd-semihosting) |
 | mips/mips32r6/mips64/mips64r6 | Unified Hosting Interface (MD01069) | `sys::mips` | |
 
@@ -101,9 +101,9 @@ semihosting = { version = "0.1", features = ["stdio", "panic-handler"] }
   location to stderr.
 
 - <a name="optional-features-trap-hlt"></a>**`trap-hlt`**<br>
-  ARM-specific: Use HLT instruction on A+R profile.
+  Arm-specific: Use HLT instruction on A+R profile.
 
-  [ARM documentation](https://github.com/ARM-software/abi-aa/blob/HEAD/semihosting/semihosting.rst#the-semihosting-interface) says:
+  [Arm documentation](https://github.com/ARM-software/abi-aa/blob/2024Q3/semihosting/semihosting.rst#the-semihosting-interface) says:
 
   > The `HLT` encodings are new in version 2.0 of the semihosting specification.
   > Where possible, have semihosting callers continue to use the previously existing
@@ -116,17 +116,17 @@ semihosting = { version = "0.1", features = ["stdio", "panic-handler"] }
   > on A32 and T32 as a configurable option. ARM strongly discourages semihosting
   > callers from mixing the `HLT` and `SVC` mechanisms within the same executable.
 
-  Based on the ARM's recommendation, this is implemented as an optional feature.
+  Based on the Arm's recommendation, this is implemented as an optional feature.
 
-  Enabling this feature on architectures other than ARM A+R profile will result in a compile error.
+  Enabling this feature on architectures other than Arm A+R profile will result in a compile error.
 
 - <a name="optional-features-openocd-semihosting"></a>**`openocd-semihosting`**<br>
   Xtensa-specific: Use OpenOCD Semihosting.
 
   Xtensa has two semihosting interfaces:
 
   - Tensilica ISS SIMCALL used in Cadence tools and [QEMU](https://www.qemu.org/docs/master/about/emulation.html#supported-targets).
-  - ARM-semihosting-compatible semihosting interface used in [OpenOCD](https://github.com/espressif/openocd-esp32/blob/HEAD/src/target/espressif/esp_xtensa_semihosting.c) and [probe-rs](https://github.com/probe-rs/probe-rs/pull/2303). (This crate calls it "OpenOCD Semihosting", which is the same as the option name in [newlib](https://github.com/espressif/newlib-esp32/blob/esp_based_on_4_1_0/libgloss/xtensa/syscalls.c#L23).)
+  - Arm-semihosting-compatible semihosting interface used in [OpenOCD](https://github.com/espressif/openocd-esp32/blob/HEAD/src/target/espressif/esp_xtensa_semihosting.c) and [probe-rs](https://github.com/probe-rs/probe-rs/pull/2303). (This crate calls it "OpenOCD Semihosting", which is the same as the option name in [newlib-esp32](https://github.com/espressif/newlib-esp32/blob/esp-4.3.0_20240530/libgloss/xtensa/syscalls.c#L21).)
 
   This crate does not currently support SIMCALL-based semihosting, but users need to explicitly enable the feature to avoid accidentally selecting a different one than one actually want to use.
 

build.rs

@@ -23,20 +23,21 @@ fn main() {
 
     if version.minor >= 80 {
         // Custom cfgs set by build script. Not public API.
-        // grep -E 'cargo:rustc-cfg=' build.rs | grep -v '=//' | sed -E 's/^.*cargo:rustc-cfg=//; s/(=\\)?".*$//' | LC_ALL=C sort -u | tr '\n' ','
+        // grep -F 'cargo:rustc-cfg=' build.rs | grep -Ev '^ *//' | sed -E 's/^.*cargo:rustc-cfg=//; s/(=\\)?".*$//' | LC_ALL=C sort -u | tr '\n' ',' | sed -E 's/,$/\n/'
         println!(
             "cargo:rustc-check-cfg=cfg(semihosting_no_error_in_core,semihosting_target_feature)"
         );
         // TODO: handle multi-line target_feature_fallback
-        // grep -E 'target_feature_fallback\("' build.rs | sed -E 's/^.*target_feature_fallback\(//; s/",.*$/"/' | LC_ALL=C sort -u | tr '\n' ','
+        // grep -F 'target_feature_fallback("' build.rs | grep -Ev '^ *//' | sed -E 's/^.*target_feature_fallback\(//; s/",.*$/"/' | LC_ALL=C sort -u | tr '\n' ',' | sed -E 's/,$/\n/'
         println!(
             r#"cargo:rustc-check-cfg=cfg(semihosting_target_feature,values("mclass","thumb-mode"))"#
         );
     }
 
-    // Note that this is `no_`*, not `has_*`. This allows treating as the latest
+    // Note that cfgs are `no_`*, not `has_*`. This allows treating as the latest
     // stable rustc is used when the build script doesn't run. This is useful
     // for non-cargo build systems that don't run the build script.
+
     // error_in_core stabilized in Rust 1.81 (nightly-2024-06-09): https://github.com/rust-lang/rust/pull/125951
     if !version.probe(81, 2024, 6, 8) {
         println!("cargo:rustc-cfg=semihosting_no_error_in_core");
@@ -138,7 +139,7 @@ mod version {
         cmd.args(rustc);
         // Use verbose version output because the packagers add extra strings to the normal version output.
         // Do not use long flags (--version --verbose) because clippy-deriver doesn't handle them properly.
-        // -vV is also matched with that cargo internally uses: https://github.com/rust-lang/cargo/blob/14b46ecc62aa671d7477beba237ad9c6a209cf5d/src/cargo/util/rustc.rs#L65
+        // -vV is also matched with that cargo internally uses: https://github.com/rust-lang/cargo/blob/0.80.0/src/cargo/util/rustc.rs#L65
         let output = cmd.arg("-vV").output().ok()?;
         let verbose_version = str::from_utf8(&output.stdout).ok()?;
         Version::parse(verbose_version)

src/io/mod.rs

@@ -224,7 +224,7 @@ pub enum SeekFrom {
     /// It is possible to seek beyond the end of an object, but it's an error to
     /// seek before byte 0.
     End(i64),
-    // TODO: It appears that SeekFrom::Current cannot be implemented with APIs provided by ARM semihosting...
+    // TODO: It appears that SeekFrom::Current cannot be implemented with APIs provided by Arm semihosting...
     // /// Sets the offset to the current position plus the specified number of
     // /// bytes.
     // ///

src/lib.rs

@@ -2,9 +2,9 @@
 
 /*!
 <!-- tidy:crate-doc:start -->
-Semihosting for AArch64, ARM, RISC-V, MIPS32, MIPS64, and Xtensa.
+Semihosting for AArch64, Arm, RISC-V, MIPS32, MIPS64, and Xtensa.
 
-This library provides access to semihosting, a mechanism for programs running on the real or virtual (e.g., QEMU) target to communicate with I/O facilities on the host system. See the [ARM documentation](https://github.com/ARM-software/abi-aa/blob/HEAD/semihosting/semihosting.rst) for more information on semihosting.
+This library provides access to semihosting, a mechanism for programs running on the real or virtual (e.g., QEMU) target to communicate with I/O facilities on the host system. See the [Arm documentation](https://github.com/ARM-software/abi-aa/blob/2024Q3/semihosting/semihosting.rst) for more information on semihosting.
 
 APIs are categorized into the following four types:
 
@@ -33,9 +33,9 @@ The following target architectures are supported:
 
 | target_arch | Specification | `semihosting::sys` module | Note |
 | ----------- | ------------- | ------------------------- | ---- |
-| aarch64 | [Semihosting for AArch32 and AArch64](https://github.com/ARM-software/abi-aa/blob/HEAD/semihosting/semihosting.rst) | `sys::arm_compat` | |
-| arm | [Semihosting for AArch32 and AArch64](https://github.com/ARM-software/abi-aa/blob/HEAD/semihosting/semihosting.rst) | `sys::arm_compat` | use `SVC` on A+R profile by default based on ARM's recommendation but it can be changed by [`trap-hlt` feature](#optional-features-trap-hlt). |
-| riscv32/riscv64 | [RISC-V Semihosting](https://github.com/riscv-non-isa/riscv-semihosting/blob/HEAD/riscv-semihosting.adoc) | `sys::arm_compat` | |
+| aarch64 | [Semihosting for AArch32 and AArch64](https://github.com/ARM-software/abi-aa/blob/2024Q3/semihosting/semihosting.rst) | `sys::arm_compat` | |
+| arm | [Semihosting for AArch32 and AArch64](https://github.com/ARM-software/abi-aa/blob/2024Q3/semihosting/semihosting.rst) | `sys::arm_compat` | use `SVC` on A+R profile by default based on Arm's recommendation but it can be changed by [`trap-hlt` feature](#optional-features-trap-hlt). |
+| riscv32/riscv64 | [RISC-V Semihosting](https://github.com/riscv-non-isa/riscv-semihosting/blob/0.5/riscv-semihosting.adoc) | `sys::arm_compat` | |
 | xtensa | [OpenOCD Semihosting](https://github.com/espressif/openocd-esp32/blob/HEAD/src/target/espressif/esp_xtensa_semihosting.c) | `sys::arm_compat` | requires [`openocd-semihosting` feature](#optional-features-openocd-semihosting) |
 | mips/mips32r6/mips64/mips64r6 | Unified Hosting Interface (MD01069) | `sys::mips` | |
 
@@ -96,9 +96,9 @@ semihosting = { version = "0.1", features = ["stdio", "panic-handler"] }
   location to stderr.
 
 - <a name="optional-features-trap-hlt"></a>**`trap-hlt`**<br>
-  ARM-specific: Use HLT instruction on A+R profile.
+  Arm-specific: Use HLT instruction on A+R profile.
 
-  [ARM documentation](https://github.com/ARM-software/abi-aa/blob/HEAD/semihosting/semihosting.rst#the-semihosting-interface) says:
+  [Arm documentation](https://github.com/ARM-software/abi-aa/blob/2024Q3/semihosting/semihosting.rst#the-semihosting-interface) says:
 
   > The `HLT` encodings are new in version 2.0 of the semihosting specification.
   > Where possible, have semihosting callers continue to use the previously existing
@@ -111,17 +111,17 @@ semihosting = { version = "0.1", features = ["stdio", "panic-handler"] }
   > on A32 and T32 as a configurable option. ARM strongly discourages semihosting
   > callers from mixing the `HLT` and `SVC` mechanisms within the same executable.
 
-  Based on the ARM's recommendation, this is implemented as an optional feature.
+  Based on the Arm's recommendation, this is implemented as an optional feature.
 
-  Enabling this feature on architectures other than ARM A+R profile will result in a compile error.
+  Enabling this feature on architectures other than Arm A+R profile will result in a compile error.
 
 - <a name="optional-features-openocd-semihosting"></a>**`openocd-semihosting`**<br>
   Xtensa-specific: Use OpenOCD Semihosting.
 
   Xtensa has two semihosting interfaces:
 
   - Tensilica ISS SIMCALL used in Cadence tools and [QEMU](https://www.qemu.org/docs/master/about/emulation.html#supported-targets).
-  - ARM-semihosting-compatible semihosting interface used in [OpenOCD](https://github.com/espressif/openocd-esp32/blob/HEAD/src/target/espressif/esp_xtensa_semihosting.c) and [probe-rs](https://github.com/probe-rs/probe-rs/pull/2303). (This crate calls it "OpenOCD Semihosting", which is the same as the option name in [newlib](https://github.com/espressif/newlib-esp32/blob/esp_based_on_4_1_0/libgloss/xtensa/syscalls.c#L23).)
+  - Arm-semihosting-compatible semihosting interface used in [OpenOCD](https://github.com/espressif/openocd-esp32/blob/HEAD/src/target/espressif/esp_xtensa_semihosting.c) and [probe-rs](https://github.com/probe-rs/probe-rs/pull/2303). (This crate calls it "OpenOCD Semihosting", which is the same as the option name in [newlib-esp32](https://github.com/espressif/newlib-esp32/blob/esp-4.3.0_20240530/libgloss/xtensa/syscalls.c#L21).)
 
   This crate does not currently support SIMCALL-based semihosting, but users need to explicitly enable the feature to avoid accidentally selecting a different one than one actually want to use.
 
@@ -252,7 +252,8 @@ semihosting = { version = "0.1", features = ["stdio", "panic-handler"] }
 // docs.rs only (cfg is enabled by docs.rs, not build script)
 #![cfg_attr(docsrs, feature(doc_cfg))]
 
-// 64-bit architecture's 32-bit ABI (e.g., AArch64 ILP32 ABI) are also unsupported yet.
+// 64-bit architecture's 32-bit ABI (e.g., AArch64 ILP32 ABI) are also
+// unsupported yet (is there a semihosting interface defined for those ABIs?).
 #[cfg(not(any(
     all(target_arch = "aarch64", target_pointer_width = "64"),
     target_arch = "arm",

src/sys/arm_compat/fs.rs

@@ -51,7 +51,7 @@ pub(crate) fn open(path: &CStr, options: &crate::fs::OpenOptions) -> Result<Owne
     sys_open(path, mode)
 }
 
-// TODO: ARM semihosting doesn't provide Large-file support (LFS).
+// TODO: Arm semihosting doesn't provide Large-file support (LFS).
 #[allow(clippy::cast_possible_wrap, clippy::cast_sign_loss)]
 pub(crate) fn seek(fd: BorrowedFd<'_>, pos: io::SeekFrom) -> Result<u64> {
     let abs_pos = match pos {