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xtensa-build-zephyr.py: add new PlatformConfig dataclass #7255

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merged 1 commit into from
Mar 14, 2023

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marc-hb
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@marc-hb marc-hb commented Mar 12, 2023

Reduces duplication and provides more flexibility.

Also switch the list of platforms to a dict.

Reduces duplication and provides more flexibility.

Also switch the list of platforms to a dict.

Signed-off-by: Marc Herbert <marc.herbert@intel.com>
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@LaurentiuM1234 LaurentiuM1234 left a comment

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+1 for the flexibility. Thanks @marc-hb !

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marc-hb commented Mar 12, 2023

I don't know why the firmware crashed in https://sof-ci.01.org/sofpr/PR7255/build4495/devicetest/index.html?model=ADLP_RVP_NOCODEC_IPC4ZPH&testcase=multiple-pause-resume-5 but for sure it was not because of this PR.

Everything else is green.

[   42.275826] <inf> host_comp: comp:4 0x40005 no bytes to copy, available bytes: 0, free_bytes: 3072
[   42.275905] <inf> eq_iir: comp:2 0xa0000 eq_iir_prepare(), source_format=2, sink_format=2
[   42.275918] <inf> eq_iir: comp:2 0xa0000 eq_iir_init_coef(): 1 responses, 2 channels, stream 4 channels
[   42.275931] <inf> eq_iir: comp:2 0xa0000 eq_iir_init_coef(), ch 0 is set to response 0
[   42.275943] <inf> eq_iir: comp:2 0xa0000 eq_iir_init_coef(), ch 1 is set to response 0
[   42.275956] <inf> eq_iir: comp:2 0xa0000 eq_iir_init_coef(), ch 2 is set to response 0
[   42.275968] <inf> eq_iir: comp:2 0xa0000 eq_iir_init_coef(), ch 3 is set to response 0
[   42.276046] <inf> pipe: pipe:2 0x0 pipe trigger cmd 7
[   42.276065] <inf> ll_schedule: task add 0xbe0b9d40 0x20180U priority 0 flags 0x0
[   42.276870] <inf> host_comp: comp:4 0x40005 no bytes to copy, available bytes: 0, free_bytes: 3072
[   42.276938] <inf> dai_intel_dmic: dmic_start(), dmic->fifo_a
[   42.276950] <inf> dai_intel_dmic: dai_dmic_update_bits base 10000, reg 0, mask 6000000, value 4000000
[   42.276961] <inf> dai_intel_dmic: dmic_start(), pdm0 mic_a = 1, mic_b = 1
[   42.276971] <inf> dai_intel_dmic: dai_dmic_update_bits base 10000, reg 1000, mask c000, value c000
[   42.276983] <inf> dai_intel_dmic: dai_dmic_update_bits base 10000, reg 100c, mask 3, value 3
[   42.276995] <inf> dai_intel_dmic: dai_dmic_update_bits base 10000, reg 1020, mask 80, value 80
[   42.277005] <inf> dai_intel_dmic: dmic_start(), pdm1 mic_a = 1, mic_b = 1
[   42.277016] <inf> dai_intel_dmic: dai_dmic_update_bits base 10000, reg 2000, mask c000, value c000
[   42.277028] <inf> dai_intel_dmic: dai_dmic_update_bits base 10000, reg 200c, mask 3, value 3
[   42.277038] <inf> dai_intel_dmic: dai_dmic_update_bits base 10000, reg 2020, mask 80, value 80
[   42.277050] <inf> dai_intel_dmic: dai_dmic_update_bits base 10000, reg 1000, mask 10000, value 0
[   42.277058] <inf> dai_intel_dmic: dmic_start(), cic 0x0000c001
[   42.277070] <inf> dai_intel_dmic: dai_dmic_update_bits base 10000, reg 2000, mask 10000, value 0
[   42.277078] <inf> dai_intel_dmic: dmic_start(), cic 0x0000c001
[   42.277091] <err> os:  ** FATAL EXCEPTION
[   42.277101] <err> os:  ** CPU 0 EXCCAUSE 13 (load/store PIF data error)
[   42.277110] <err> os:  **  PC 0xbe01c72c VADDR 0x80008004
[   42.277116] <err> os:  **  PS 0x60220
[   42.277130] <err> os:  **    (INTLEVEL:0 EXCM: 0 UM:1 RING:0 WOE:1 OWB:2 CALLINC:2)
[   42.277141] <err> os:  **  A0 0xbe019113  SP 0xbe0a5b90  A2 0xbe082ebc  A3 0x80008000
[   42.277151] <err> os:  **  A4 0xf  A5 0x9e093db4  A6 0x9e0a81ac  A7 (nil)
[   42.277161] <err> os:  **  A8 0x1  A9 0x1 A10 0x9e0a8190 A11 0x18c0
[   42.277171] <err> os:  ** A12 (nil) A13 (nil) A14 0xbe097db0 A15 0xbe097dc0
[   42.277180] <err> os:  ** LBEG 0xbe01cc01 LEND 0xbe01cc15 LCOUNT 0xbe01cf6c
[   42.277188] <err> os:  ** SAR 0x18

Backtrace:0xbe01c729:0xbe0a5b90 0xbe019110:0xbe0a5bTerminated

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@aborisovich good for Windows ?

@lgirdwood lgirdwood merged commit ad8b54f into thesofproject:main Mar 14, 2023
@marc-hb marc-hb deleted the platf-dataclass branch March 21, 2023 21:45
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5 participants