Opensource DDR3 Controller
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Nov 3, 2024 - Verilog
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ddr3
Here are 26 public repositories matching this topic...
SPD Reader & Writer with Software Write Protection capabilities supporting Arduino and SMBus
windows
arduino
amd
ddr
intel
nvidia
smbus
spd
eeprom-programmer
eeprom-reader
sdram
ddr3
ddr4
ddr2
spd-reader
spd-writer
ddr5
rswp
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Jun 23, 2024 - C#
DDR3 Controller v1.65, 16 read/write ports, configurable widths, priority, auto-burst size & cache on each port. VGA/HDMI multiwindow video controller with alpha-blended layers. Docs & TBs included.
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Apr 8, 2024 - SystemVerilog
A DDR3(L) PHY and controller, written in Verilog, for Xilinx 7-Series FPGAs
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Dec 1, 2022 - Verilog
mirror of https://git.elphel.com/Elphel/eddr3
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Oct 16, 2017 - Verilog
A RISC-V SBC based around the LambdaConcept USB2Sniffer FPGA board.
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May 10, 2020 - Verilog
A curated list of awesome Rowhammer papers, tools, and info resources. 👉 Content coming soon, stay tuned!
academic
awesome-list
dram
attacks
hardware-security
ddr3
rowhammer
defenses
ddr4
ddr5
hardware-attacks
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Jun 17, 2022
Demo board for the i.MX6ULL Single-Core Processor with Arm Cortex-A7 Core
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Jun 2, 2024
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