Digital logic design tool and simulator

Teaching-focused digital circuit simulator

IceChips is a library of all common discrete logic devices in Verilog

Here are my GATE CSE 2021 Resources

A digital logic simulator inspired by Logisim.

Labs for Computer Science: C, Assembly, Data Structure, CSAPP, HSI, MATLAB, Digital Logic, Verilog, Compilers, Operating Systems

Simple Java application for simulating digital circuits

here the notes provided by the seniors who already cracked IITs as well as how much I'll cover for my exams I'll provide my notes as well. If you want you can access the course by these links also

A simple 8 bit UART implementation in Verilog, with tests and timing diagrams

VHDL code examples for a digital design course

32bit Simplifier of Boolean functions

透過數位邏輯結合VHDL與Verilog的過程，作為從基礎數位邏輯到計算機系統結構，並實作出一顆CPU的教學書籍，希望未來可以成為教學範例檔案。目前將開發轉移到GitLab，因為可以呈現數學與MUL圖。

This is the mirror for gitee in github for project assignment of cs202 / 214 Computer Organization course of Southern University of Science and Technology， which is to manufacture a CPU. 这是南方科技大学CS202/214计算机组成原理课程的大作业——实现一个CPU。

Compiling finite generators to digital logic. WIP

An experimental package manager and development tool for Hardware Description Languages (HDL).

WIP open source tooling for the XC9500 / XC9500XL series of CPLDs from Xilinx.

The design and implementation of simple computer by quartus.

A powerful tool for minimizing Boolean functions

Formal verification engine for Verilog with built-in support for simulating flip-flop metastability

This repository contains the codes for various type of circuits simulated in VHDL in Xilinx ISE Design.