ice40
Here are 120 public repositories matching this topic...
Open source ultrasound processing modules and building blocks
-
Updated
Nov 9, 2024 - Jupyter Notebook
FOSS architecture definitions of FPGA hardware useful for doing PnR device generation.
-
Updated
Nov 8, 2024 - Jupyter Notebook
An attempt at a small Verilog implementation of the original Apple 1 on an FPGA
-
Updated
Apr 29, 2024 - Verilog
New clean hdmi implementation for ulx3s, icestick, icoboard, arty7, colorlight i5 and blackicemx! With tmds encoding hacked down from dvi standard. Supports DDR and SRD tranfser!
-
Updated
Oct 16, 2023 - GLSL
FPGA-based LPC bus sniffing tool for Lattice iCEstick Evaluation Kit
-
Updated
Jan 5, 2024 - Verilog
RealtimeIO for LinuxCNC based on an FPGA
-
Updated
Sep 2, 2024 - Python
Small Processing Unit 32: A compact RV32I CPU written in Verilog
-
Updated
May 30, 2022 - C
Simple voltage glitcher implementation for the Lattice iCEstick Evaluation Kit
-
Updated
Jan 30, 2020 - Verilog
IP operations in verilog (simulation and implementation on ice40)
-
Updated
Oct 24, 2019 - Verilog
A collection of little open source FPGA hobby projects
-
Updated
Feb 6, 2020 - SystemVerilog
Over-engineered SDR development board
-
Updated
Nov 1, 2024 - VHDL
Improve this page
Add a description, image, and links to the ice40 topic page so that developers can more easily learn about it.
Add this topic to your repo
To associate your repository with the ice40 topic, visit your repo's landing page and select "manage topics."