A systolic array simulator for multi-cycle MACs and varying-byte words, with the paper accepted to HPCA 2022.
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Updated
Nov 7, 2021 - C++
A systolic array simulator for multi-cycle MACs and varying-byte words, with the paper accepted to HPCA 2022.
This is a general-purpose simulator for unary computing based on PyTorch, with the paper accepted to ISCA 2020 and awarded IEEE Micro Top Pick for 2020.
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