Advanced Physical Design Workshop Using OPENLANE/SKY130

Day 1

We enter the directory where openlane is installed and run the docker command.

cd /Desktop/work/tools/openlane_working_dir/openlane
docker

After that we run the openlane script.

./flow.tcl -interactive
package require openlane 0.9

Next we prep the design.

prep -design picorv32a prepares the picorv32a design

run_synthesis We get a cell list like below.

Flop Ratio --> 1613/14876 = 0.1084
Buffer Ration --> (1656+8)/14876 = 0.1118

Day 2

Tcl files for each step is stored under the config folder

We run the command run_floorplan After the command we can find the log files at /Desktop/work/tools/openlane_working_dir/openlane/dateOfFolder/logs/floorplan

Magic

We open the created floorplan file in Magic.

After running run_placement we open the .def file in magic

Changing FP_IO_MODE

Setting FP_IO_MODE 2
All IO pins at the bottom left corner.

DAY 3

First we start by cloning the repo which contains the standard cell files. Copying the necessary files to their required location. Opening the standard cell in Magic.

Extracting the SPICE netlist

A .spice file is generated which is edited for our needs.

NgSPICE

Running the ngspice sim with the command.
ngspice sky130_inv.spice
and plotting using the command.
plot y vs time a

Before Changing the C load

After Changing the C load

RISE TIME
Rise time comes out to be 0.061ns

RISE PROPAGATION DELAY

Rise propagation comes out to be 0.060ns

DAY 4

Open the inv cell in magic and we set a grid. The .lef file generated from the command lef_write

Copying the necessary files to merge the lef file.

Config.tcl

Adding lines to configure openlane to use picorv32a design.

run_synthesis

Successful integration of the inverter standard cell.

Finding the cell in the Design

STA

Running the command sta pre-sta.tcl prints a timing report. Where a slack of -36.62 is reported.

Recognizing slower cells.

Slower cells are replaced by faster cells with the command replace_cell.

Slack is reduced to -34.66 from -36.62

Clock Tree Synth

run_cts

DAY 5

PDN

To generate the Power Distribution Network we run the following commands.

init_floorplan
place_io
global_placement_or
detailed_placement
tap_decap_or
detailed_placement
gen_pdn

gen_pdn

run_routing

Opening the routing result in magic. Checking a Standard Cell

DRC checks are incomplete