Skip to content
New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

Nexys video fpga bringup config #1942

Merged
merged 2 commits into from
Aug 6, 2024
Merged

Nexys video fpga bringup config #1942

merged 2 commits into from
Aug 6, 2024

Conversation

SeahK
Copy link
Contributor

@SeahK SeahK commented Aug 2, 2024

Related PRs / Issues:

Type of change:

  • Bug fix
  • New feature
  • Other enhancement

Impact:

  • RTL change
  • Software change (RISC-V software)
  • Build system change
  • Other

Contributor Checklist:

  • Did you set main as the base branch?
  • Is this PR's title suitable for inclusion in the changelog and have you added a changelog:<topic> label?
  • Did you state the type-of-change/impact?
  • Did you delete any extraneous prints/debugging code?
  • Did you mark the PR with a changelog: label?
  • (If applicable) Did you update the conda .conda-lock.yml file if you updated the conda requirements file?
  • (If applicable) Did you add documentation for the feature?
  • (If applicable) Did you add a test demonstrating the PR?
  • (If applicable) Did you mark the PR as Please Backport?

@SeahK SeahK requested a review from jerryz123 August 2, 2024 03:38
@SeahK SeahK changed the title Nexys fpga bringup Nexys video fpga bringup config Aug 2, 2024
@@ -36,3 +46,55 @@ class WithNexysVideoDDRTL extends HarnessBinder({
ddrClientBundle <> port.io
}
})

// Uses PMOD JA/JB
class WithNexysVideoSerialTLToGPIO extends HarnessBinder({
Copy link
Contributor

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

Are these GPIO Pins or FMC pins?

Copy link
Contributor Author

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

pmod, I saw Arty one used pmod, so I mapped these to nexysvideo's pmod JA/JB pins.

Copy link
Contributor

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

I see.

Can you also push a version that maps it to FMC?

@jerryz123 jerryz123 merged commit 0f888a1 into main Aug 6, 2024
55 of 56 checks passed
@jerryz123 jerryz123 deleted the nexys-fpga branch August 6, 2024 19:37
Sign up for free to join this conversation on GitHub. Already have an account? Sign in to comment
Projects
None yet
Development

Successfully merging this pull request may close these issues.

2 participants