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Chipyard 1.4.0 Release #599

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Jan 20, 2021
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949d605
Revert "Support evaluation of HarnessBinders in LazyModule context"
abejgonzalez Oct 14, 2020
6aefb73
Merge remote-tracking branch 'origin/dev' into diplomatic-clocks-mbus…
davidbiancolin Oct 14, 2020
9c8d294
[firechip] Fix a broken config
davidbiancolin Oct 14, 2020
dcac9b7
Basic working with UART
abejgonzalez Oct 14, 2020
7f387a2
Working up until the MMC attachment
abejgonzalez Oct 15, 2020
4a317b0
differentiate default config package delimiter
alonamid Oct 15, 2020
2c935b4
pull firesim mem model config into firesim tweaks
alonamid Oct 15, 2020
20d3b9f
bump firesim
alonamid Oct 15, 2020
c7a197d
docs
alonamid Oct 15, 2020
6479d54
bump firesim
alonamid Oct 15, 2020
fd4a70d
docs typos
alonamid Oct 15, 2020
74c1c9d
Punch out reset in AXI4MMIO IOBinder
davidbiancolin Oct 15, 2020
b747116
Bump FireSim
davidbiancolin Oct 15, 2020
9ba4918
Inject MMCDevice into TLSPI Node
abejgonzalez Oct 15, 2020
84e0bf7
Don't annotate cores with FAMEModelAnnotations
albert-magyar Oct 15, 2020
f3e1cb4
Merge pull request #696 from ucb-bar/no-default-core-fame-models
davidbiancolin Oct 15, 2020
6eaac63
address PR comments
alonamid Oct 16, 2020
8de7aa8
bump firesim
alonamid Oct 16, 2020
46ea900
Merge pull request #695 from ucb-bar/shared-configs
alonamid Oct 16, 2020
1b94e7f
Merge remote-tracking branch 'origin/dev' into diplomatic-clocks-mbus…
davidbiancolin Oct 16, 2020
9927231
Support lazy-iobinders
jerryz123 Oct 18, 2020
035e2e4
Add test for make TOP=DigitalTop
jerryz123 Oct 18, 2020
c5e3ad0
Bump tcip and fsim
davidbiancolin Oct 19, 2020
11fdf69
Merge pull request #693 from ucb-bar/smartelf2hex-memsiz
jerryz123 Oct 19, 2020
f3d666d
Clarify HarnessBinders ClassTag naming
jerryz123 Oct 19, 2020
dd358f4
UART Working... Bumped to newer fpga-shells
abejgonzalez Oct 19, 2020
a3c0e3a
Merge pull request #690 from ucb-bar/diplomatic-clocks-mbus-crossing
davidbiancolin Oct 19, 2020
e0bf907
Merge remote-tracking branch 'origin/dev' into lazy-iobinders
jerryz123 Oct 19, 2020
7a55c55
Fix no-MBUS configs
jerryz123 Oct 19, 2020
db73cab
Add BootROM | Fix ResetWrangler for DDR | Add scripts
abejgonzalez Oct 21, 2020
a07369a
Merge remote-tracking branch 'ch/lazy-iobinders' into local-fpga-temp
abejgonzalez Oct 21, 2020
ac19117
Add MultiRoCCGemmini config fragment
jerryz123 Oct 23, 2020
0c4dcff
Fixed lowercase p bug
zitaofang Oct 23, 2020
abbeb2a
Fixed comments
zitaofang Oct 24, 2020
4fdb9eb
Merge pull request #647 from ucb-bar/verilator-makefile-fix
zitaofang Oct 24, 2020
d61b31a
Merge pull request #702 from ucb-bar/multirocc-gemmini
jerryz123 Oct 26, 2020
93e57ef
Make the ChipTop reset pin async always
jerryz123 Oct 26, 2020
3c42e2c
Fixed BootROM | Updated HarnessBinders
abejgonzalez Oct 27, 2020
0eca51b
Reorganize into bringup/simple | Bump sifive-blocks
abejgonzalez Oct 27, 2020
f4d7012
Remove redundant ChipTop reset synchronizer
jerryz123 Oct 28, 2020
7b83da0
Clean up HarnessBinders
jerryz123 Oct 28, 2020
a385963
Merge pull request #703 from ucb-bar/default-async-reset
jerryz123 Oct 29, 2020
2d010b6
Merge branch 'dev' into lazy-iobinders
jerryz123 Nov 2, 2020
3e4fddb
make hammer work according to docs
alonamid Nov 2, 2020
0f3f283
example ymls
alonamid Nov 2, 2020
8bf2317
VLSI docs revamp midpoint
alonamid Nov 2, 2020
3741515
Merge pull request #699 from ucb-bar/lazy-iobinders
jerryz123 Nov 3, 2020
57a0bc5
Fix zsh compatibility in init-submodules-no-rv-tools (#705)
davidbiancolin Nov 3, 2020
946a191
[clocking] Provide a default div for ClockDividerN sv implementation …
davidbiancolin Nov 3, 2020
f387634
[clocking] Bound SimplePllConfiguration by maximum reference freq
davidbiancolin Nov 2, 2020
aa4a449
[clocking] Add ScalaTests for the divider-only PLL configurator
davidbiancolin Nov 2, 2020
f504b7a
[clocking] Improve reference clock selection using a multiple-of-fast…
davidbiancolin Nov 3, 2020
16c34e2
Bump Dromajo for old glibc
abejgonzalez Nov 4, 2020
5e3d1a6
Add --ignore-qemu flag to toolchains | Prepare QEMU when it builds
abejgonzalez Nov 4, 2020
a2ebbee
Rename Ariane to CVA6
abejgonzalez Nov 4, 2020
94eceeb
Use empty variable instead of t/f
abejgonzalez Nov 4, 2020
fc8c5e4
Use HTTPS for submodules
abejgonzalez Nov 5, 2020
59c9163
Bump CVA6 for submodule fixes
abejgonzalez Nov 5, 2020
9052b41
Re-ignore QEMU from gnu-toolchain | Avoid piping make version in tool…
abejgonzalez Nov 5, 2020
60cd999
Bump CVA6 for Make fix
abejgonzalez Nov 5, 2020
c083d5d
Merge pull request #707 from ucb-bar/simple-pll-fixes
davidbiancolin Nov 5, 2020
0685812
Bump CVA6
abejgonzalez Nov 5, 2020
c619df2
Merge branch 'local-fpga-temp' into local-fpga-support
abejgonzalez Nov 5, 2020
3994bce
Merge remote-tracking branch 'secret/local-fpga-arty-harnessbinders' …
abejgonzalez Nov 5, 2020
356fa70
Update fpga-shells submodule | Fix Arty Makefile lines
abejgonzalez Nov 5, 2020
a7ab0da
Updated VCU118 | Bumped naming on Arty
abejgonzalez Nov 5, 2020
a281869
Fix Arty merge and errors from CY bump
abejgonzalez Nov 5, 2020
43e64de
Readd ignore fpga-shells in main submodule setup
abejgonzalez Nov 5, 2020
083f34a
Revert Chipyard system | Create new VCU118 Chipyard system
abejgonzalez Nov 5, 2020
2de5f7d
[ci skip] Note that CVA6 was called Ariane in the past
abejgonzalez Nov 5, 2020
255e88f
Initial outline of FPGA prototyping docs
abejgonzalez Nov 6, 2020
9a5b67b
Use Chipyard configs as a base (VCU118)
abejgonzalez Nov 6, 2020
b0fc045
Use Chipyard configs as base (Arty)
abejgonzalez Nov 6, 2020
313fa4f
Merge branch 'local-fpga-support' into local-fpga-support-docs
abejgonzalez Nov 6, 2020
84508be
More FPGA prototyping docs
abejgonzalez Nov 6, 2020
c721d89
Point to SiFive license | Add require on Arty
abejgonzalez Nov 6, 2020
b0eed50
[temp] start integrating tsi host widget
abejgonzalez Nov 6, 2020
b7ef848
Add some docs on debugging
abejgonzalez Nov 6, 2020
5c5a4b5
Merge pull request #710 from ucb-bar/rename-ariane
abejgonzalez Nov 6, 2020
6aae66c
Add TSI Host Widget
abejgonzalez Nov 6, 2020
7baa134
Use 2nd system clock for TSI DDR | Small cleanups
abejgonzalez Nov 7, 2020
98fcea7
Adding initial Arty documentation; will be expanded further.
Nov 7, 2020
e20311d
Adding implementation details for the Arty.
Nov 7, 2020
8fb76dd
Fixed syntax.
Nov 7, 2020
9144e3c
Fix pin mappings for TSI DDR
abejgonzalez Nov 7, 2020
c5e8fec
Small renaming and cleanup
abejgonzalez Nov 7, 2020
a9b9054
Merge pull request #5 from ucb-bar/local-fpga-temp
abejgonzalez Nov 7, 2020
5a4cad0
Merge pull request #6 from ucb-bar/local-fpga-support-docs
abejgonzalez Nov 7, 2020
9c12ce0
Create new prototyping section | Address some comments | Small clarif…
abejgonzalez Nov 8, 2020
38a6bae
Add CI for Arty/VCU118 (just verilog)
abejgonzalez Nov 8, 2020
a559d62
[clocking] Drive all buses directly from the asyncClockGroup
davidbiancolin Nov 8, 2020
244205e
Separate new sys_clk and ddr2 from TSI
abejgonzalez Nov 9, 2020
082b230
Add missing file
abejgonzalez Nov 9, 2020
4145465
Merge pull request #7 from ucb-bar/local-fpga-support-more-modular
abejgonzalez Nov 9, 2020
04cd6b5
[clocking] Add a fragment to set bus clock-sink freqs more intuitively
davidbiancolin Nov 8, 2020
4da9e49
[clocking] Fix up() invocations in freq specification fragments
davidbiancolin Nov 8, 2020
08c3101
Build out a more complete multiclock example configuration
davidbiancolin Nov 8, 2020
098a83c
[CI] Add a multiclock config
davidbiancolin Nov 8, 2020
230bd81
[firechip] Update legacy firechip config
davidbiancolin Nov 8, 2020
714fb56
Addressing PR comments in docs.
Nov 9, 2020
bb5d6bc
Merge pull request #713 from ucb-bar/better-bus-freq-spec
davidbiancolin Nov 10, 2020
80487cc
Update HierarchicalMulticlockBusTopologyParams to use cross{In, Out}
davidbiancolin Nov 10, 2020
1110dd7
Bump RC, firesim and barstools for chisel3.4 updates
timsnyder-siv Nov 11, 2020
7ca3be2
Bump bringup VCU118 | Ignore HTIF if no-debug module
abejgonzalez Nov 12, 2020
d5a0fd1
Address CircleCI
abejgonzalez Nov 12, 2020
999ae05
Address some docs, build.sbt, .gitmodules
abejgonzalez Nov 12, 2020
55f19f7
Address fpga srcs
abejgonzalez Nov 12, 2020
63b3d42
Change NotSimulator to NoSimulator
abejgonzalez Nov 12, 2020
d4d989c
Rename make target to bitstream | Delete unused make stuff / tcl
abejgonzalez Nov 12, 2020
1b4826a
Generalize debug-bitstream
abejgonzalez Nov 13, 2020
61e1730
Small fix to docs
abejgonzalez Nov 13, 2020
f8bd8ea
Small fix to run_impl_bitstream
abejgonzalez Nov 13, 2020
650ba7c
Merge pull request #715 from ucb-bar/bus-crossing-fix
davidbiancolin Nov 14, 2020
06f9011
update example yml files
alonamid Nov 15, 2020
2dd8bb4
Merge branch 'hammer-docs' of https://github.com/ucb-bar/chipyard int…
alonamid Nov 15, 2020
d7cc6b9
update hammer basic flow doc
alonamid Nov 15, 2020
f54dce1
Merge pull request #709 from ucb-bar/small-backwards-compat
abejgonzalez Nov 15, 2020
c8add48
Reduce BOOM default freq. (play it safe)
abejgonzalez Nov 15, 2020
d94a8ef
Fix TLMemPort comment | Use Option instead of NoSimulator
abejgonzalez Nov 15, 2020
9ea23d4
Merge remote-tracking branch 'origin/dev' into local-chisel34
abejgonzalez Nov 16, 2020
ba59d03
Bump barstools
abejgonzalez Nov 16, 2020
70d4321
[temp] Unable to build/get past chisel-testers
abejgonzalez Nov 16, 2020
1c0707b
Merge remote-tracking branch 'origin' into hammer-docs
alonamid Nov 17, 2020
fef06f2
Merge remote-tracking branch 'origin/dev' into hammer-docs
alonamid Nov 17, 2020
9d9813f
[temp] Following RC's way to build Chisel from source or Maven [ci skip]
abejgonzalez Nov 17, 2020
a0d479f
Working FIRRTL/RC/Chisel3 build | chisel-testers still broken
abejgonzalez Nov 17, 2020
1b00d54
Add config fragment for replacing L2 with broadcastManager
jerryz123 Nov 17, 2020
95e8365
Small change to Arty reset binder name, per Jerry's PR comment.
Nov 19, 2020
5b1b4b3
Bump Gemmini/Hwacha/Sha3
abejgonzalez Nov 19, 2020
222580a
Bump dsptools
abejgonzalez Nov 20, 2020
571e751
Bump barstools, chisel-testers, dsptools | Split build.sbt dependenci…
abejgonzalez Nov 20, 2020
11ab0d7
Put libdeps back into commonSettings in build.sbt
abejgonzalez Nov 20, 2020
2b4fb55
Use ProjectRef for FIRRTL and use it for firrtl-interpreter
abejgonzalez Nov 20, 2020
51b254f
Small build.sbt cleanup
abejgonzalez Nov 20, 2020
c6e49e0
Follow RC's SBT sriracha use | Bump FIRRTL plugin
abejgonzalez Nov 20, 2020
6f82745
Helper make target to launch SBT | Move SBT_OPTS to SBT variable
abejgonzalez Nov 21, 2020
3dfc03c
Add more plugins and libdeps
abejgonzalez Nov 21, 2020
9545abb
Working elaboration (breaks during barstools FIRRTL)
abejgonzalez Nov 21, 2020
94c85c7
bump IceNet for input/output tap and checksum fixes
zhemao Nov 16, 2020
661a770
Share DigitalTop/ChipyardSystem | Fix small naming compile error
abejgonzalez Nov 23, 2020
14de80b
Merge pull request #720 from ucb-bar/icenet-tap-fixes
zhemao Nov 24, 2020
8f6de22
Fixed TinyRocketConfig | Small cleanup to VCU118/Arty configs
abejgonzalez Nov 24, 2020
f1fdab5
Move TL mem switch frag to CY | Add require to not have TL/AXI backin…
abejgonzalez Nov 24, 2020
71a3ea8
Allow custom verilator optimization flags
jerryz123 Nov 25, 2020
c223f18
Bump barstools
abejgonzalez Nov 26, 2020
8a46d4a
Bump BOOM and Barstools
abejgonzalez Nov 28, 2020
60e834c
Bump FireSim
abejgonzalez Nov 29, 2020
b7ed614
Attempt at "fixing" build.sbt | Bump sub-projects
abejgonzalez Dec 1, 2020
13602dc
Merge pull request #728 from ucb-bar/verilator-opt
abejgonzalez Dec 1, 2020
477be36
Apply suggestions from code review
alonamid Dec 1, 2020
5bc7e6c
Support SBT thin client | Rename JAVA_ARGS -> OPTS | Support env. SBT…
abejgonzalez Dec 2, 2020
70d4199
Merge pull request #721 from ucb-bar/jerryz123-patch-1
jerryz123 Dec 2, 2020
4e53dc1
Cleanly reload proj. defs. with thin client support
abejgonzalez Dec 2, 2020
a0e2dcf
Remove support for bloop
abejgonzalez Dec 2, 2020
08f3dbc
Bump FireSim
abejgonzalez Dec 2, 2020
1458853
Bump Hwacha
abejgonzalez Dec 2, 2020
3bc1bdb
Bump BOOM | Split JAVA/SBT options in CI
abejgonzalez Dec 2, 2020
eee0d58
Cleanup comment
abejgonzalez Dec 2, 2020
41c710b
Bump FireSim
abejgonzalez Dec 3, 2020
d19bcaa
Bump FireSim
abejgonzalez Dec 3, 2020
7f9cd0f
Bump FireSim | CI Fix Attempt: Increase heap
abejgonzalez Dec 3, 2020
f1df2ec
Bump FireSim/Hwacha | Cleanup linting
abejgonzalez Dec 3, 2020
d0079a9
Cleanup helper sbt targets | Use project/target/active.json for SBT t…
abejgonzalez Dec 3, 2020
70fa0a0
Print full stack traces (default traceLevel = 0) | Bump FireSim
abejgonzalez Dec 3, 2020
714687c
Add to help target | Cleanup build.sbt a bit more
abejgonzalez Dec 4, 2020
d8fd94d
[skip ci] address some PR comments
alonamid Dec 7, 2020
db1543c
[skip ci] hammer request message
alonamid Dec 7, 2020
d603794
[skip ci] remove vlsi.core.node from example
alonamid Dec 7, 2020
76ba68b
Bump hwacha
davidbiancolin Dec 10, 2020
1787fda
Bump icenet
davidbiancolin Dec 10, 2020
ee436c9
[firechip] Fix a uart multiclock bug
davidbiancolin Dec 10, 2020
f1f4799
Bump FireSim
davidbiancolin Dec 11, 2020
db15419
Bump barstools
davidbiancolin Dec 11, 2020
d4d483c
Bump BOOM | Use ucb-bar fork chisel-testers
abejgonzalez Dec 11, 2020
5c7c129
Bump Gemmini+Dsptools | Fix SBT_OPTs in CI
abejgonzalez Dec 11, 2020
939e3a9
Bump paradise plugin | Remove extra rm for SBT-server timestamp | Sma…
abejgonzalez Dec 11, 2020
fe4aa6c
Bump BOOM/Gemmini
abejgonzalez Dec 11, 2020
f1e3117
Bump barstools for test fixes | Small bump FireSim
abejgonzalez Dec 11, 2020
98a3e44
Merge remote-tracking branch 'origin/dev' into local-chisel34
abejgonzalez Dec 11, 2020
8f1e209
Update FireSim CI. Push threading into test context
davidbiancolin Dec 12, 2020
558cff7
update partial power flow
alonamid Dec 13, 2020
1bd5144
[ci skip] Fix Typo in firechip/src/test/scala/ScalaTestSuite.scala
davidbiancolin Dec 13, 2020
a8d6dae
Small build.sbt comments
abejgonzalez Dec 13, 2020
02f22e0
Bump build.sbt.patch [ci skip]
abejgonzalez Dec 13, 2020
6c85ed4
Merge pull request #719 from ucb-bar/local-chisel34
abejgonzalez Dec 13, 2020
0754c1e
toolchains: Disable CC and CXX overrides for libgloss build
a0u Dec 14, 2020
8836f84
[vlsi] Add USE_SRAM_COMPILER Makefile flag to use memory compiler def…
jerryz123 Dec 16, 2020
f693972
Start RC bump
timsnyder Dec 18, 2020
95420ba
Bump boom for riscv-boom/riscv-boom#508
timsnyder-siv Dec 18, 2020
c6dfa1d
Bump testchipip for ucb-bar/testchipip#111
timsnyder-siv Dec 18, 2020
5ff5b4e
Bump sifive-cache for sifive/block-inclusivecache-sifive#18
timsnyder Dec 18, 2020
f7a3721
Bump hwacha for ucb-bar/hwacha#24
timsnyder Dec 18, 2020
022dbf9
Bump boom along in the same PR
timsnyder Dec 18, 2020
2ce5f6a
Bump cva6 for ucb-bar/cva6-wrapper#11
timsnyder Dec 18, 2020
a2ce14f
Bump sodor for ucb-bar/riscv-sodor#60
timsnyder Dec 18, 2020
cb558b5
bump boom along same PR
timsnyder Dec 18, 2020
a7e6de8
rm *XTypeKey. upstreamed to RC
timsnyder Dec 18, 2020
72d084d
update parameter classes for RC additions
timsnyder Dec 18, 2020
29ab630
bump sifive-cache for merged sifive/block-inclusivecache-sifive#15
timsnyder Dec 21, 2020
e223500
bump boom along same PR
timsnyder Dec 21, 2020
36b9bf8
Update MINGIT version to 1.8.5 (#745)
jerryz123 Dec 23, 2020
0f47d80
bump boom along same PR
timsnyder-siv Dec 23, 2020
6b0d57d
Merge pull request #742 from ucb-bar/bump-rc-chisel-firrtl-3.4.1.x
jerryz123 Dec 26, 2020
ca723f1
Merge branch 'dev' into local-fpga-support
abejgonzalez Dec 28, 2020
7a0ca12
Bump build.sbt
abejgonzalez Dec 28, 2020
b797077
Fix Arty documentation link
abejgonzalez Dec 28, 2020
cb488b8
Init fpga-shells submod in CI
abejgonzalez Dec 28, 2020
fbb8ad3
Fix small documentation errors
abejgonzalez Dec 28, 2020
b1cedf2
Make TinyRocketConfig work with multi-clock work
abejgonzalez Dec 28, 2020
a6ca3d2
Bump testchipip
abejgonzalez Dec 29, 2020
5099a96
Bump fpga-shells (to sifive/master)
abejgonzalez Dec 29, 2020
2e1aba6
Bump chisel-testers back to freechipsproject
abejgonzalez Dec 29, 2020
06dccdb
Organize check commit CI printout | Don't copy .git folder in CI
abejgonzalez Dec 29, 2020
6f9dcf5
Add new SSH key to access build server
abejgonzalez Dec 30, 2020
ec1efc1
Add small comment
abejgonzalez Dec 30, 2020
4c549a5
Merge pull request #750 from ucb-bar/minor-ci-updates
abejgonzalez Dec 30, 2020
0509c0c
Merge remote-tracking branch 'origin/dev' into local-fpga-support
abejgonzalez Dec 30, 2020
5f5c80d
Merge remote-tracking branch 'origin/dev' into bump-ch-test
abejgonzalez Dec 30, 2020
bcd847d
Merge pull request #751 from ucb-bar/bump-ch-test
abejgonzalez Dec 30, 2020
6d8627f
Merge pull request #739 from ucb-bar/libgloss
abejgonzalez Dec 30, 2020
c8cbfbe
Small documentation addition on bringup
abejgonzalez Dec 31, 2020
4d3ff26
Bump testchipip
abejgonzalez Jan 4, 2021
5505aef
Bump sifive-blocks
abejgonzalez Jan 8, 2021
d1d7bb8
Merge pull request #747 from ucb-bar/local-fpga-support
abejgonzalez Jan 9, 2021
7e092c6
docs label disambiguation
alonamid Jan 9, 2021
b4403a4
Merge remote-tracking branch 'origin/dev' into hammer-docs
alonamid Jan 9, 2021
d12c5f1
resolve docs merge conflict
alonamid Jan 9, 2021
06cee8f
add hierarchical
alonamid Jan 9, 2021
b1b230b
Fix ICache SPAD base addr to avoid conflicts with default SerialTL mem
jerryz123 Jan 11, 2021
4156bd8
Bump testchipip and sodor | increase sodor SerialTL width for faster …
jerryz123 Jan 11, 2021
f624609
Merge remote-tracking branch 'origin/dev' into sodor-testchipip-bump
jerryz123 Jan 11, 2021
4caecb9
Merge pull request #718 from ucb-bar/hammer-docs
jerryz123 Jan 11, 2021
c57f5a9
Merge pull request #754 from ucb-bar/sodor-testchipip-bump
jerryz123 Jan 11, 2021
e1ea356
Bump firemarshal to v1.11.0
Jan 12, 2021
c481dc2
Add 16-core LargeBOOM config to firechip
albert-magyar Jan 13, 2021
e9f64a8
Merge pull request #755 from ucb-bar/marshal1.11.0
NathanTP Jan 13, 2021
10dbf68
bump prebuilt toolchain
alonamid Jan 13, 2021
f7a98f2
Merge pull request #756 from ucb-bar/16-largeboom
albert-magyar Jan 13, 2021
36fe690
scripts: Ensure git config changes are reverted on failure
a0u Jan 14, 2021
5a53439
Bump Firesim for release
jerryz123 Jan 18, 2021
72038b6
Add new DAC paper link
jerryz123 Jan 19, 2021
1dcfa5a
Update AXI4Fragmenter docs
jerryz123 Jan 19, 2021
3bb0870
[ci skip] Fix SonicBOOM citation
jerryz123 Jan 19, 2021
55e4a1a
Merge pull request #766 from ucb-bar/doc-update
jerryz123 Jan 19, 2021
516b3f3
Merge pull request #763 from ucb-bar/bump-prebuilt-toolchains
alonamid Jan 20, 2021
65005b7
Merge pull request #765 from ucb-bar/fsim-bump
jerryz123 Jan 20, 2021
a7652ce
Merge pull request #761 from ucb-bar/init-submodules-gitconfig
jerryz123 Jan 20, 2021
429a32b
Update CHANGELOG for 1.4.0 release
jerryz123 Jan 20, 2021
cc58048
Update CHANGELOG
jerryz123 Jan 20, 2021
d4f8f56
Merge pull request #767 from ucb-bar/rel-changelog
jerryz123 Jan 20, 2021
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18 changes: 13 additions & 5 deletions .circleci/README.md
Original file line number Diff line number Diff line change
Expand Up @@ -34,11 +34,19 @@ Here the key is built from a string where the `checksum` portion converts the fi
This directory contains all the collateral for the Chipyard CI to work.
The following is included:

`build-toolchains.sh` # build either riscv-tools or esp-tools
`create-hash.sh` # create hashes of riscv-tools/esp-tools so circleci caching can work
`do-rtl-build.sh` # use verilator to build a sim executable (remotely)
`config.yml` # main circleci config script to enumerate jobs/workflows
`defaults.sh` # default variables used
`build-toolchains.sh` # build either riscv-tools or esp-tools
`create-hash.sh` # create hashes of riscv-tools/esp-tools so circleci caching can work
`do-rtl-build.sh` # use verilator to build a sim executable (remotely)
`config.yml` # main circleci config script to enumerate jobs/workflows
`defaults.sh` # default variables used
`check-commit.sh` # check that submodule commits are valid
`build-extra-tests.sh` # build default chipyard tests located in tests/
`clean-old-files.sh` # clean up build server files
`do-fpga-rtl-build.sh` # similar to `do-rtl-build` but using fpga/
`install-verilator.sh` # install verilator on build server
`run-firesim-scala-tests.sh` # run firesim scala tests
`run-tests.sh # run tests for a specific set of designs
`images/` # docker image used in CI

How things are setup for Chipyard
---------------------------------
Expand Down
29 changes: 22 additions & 7 deletions .circleci/check-commit.sh
Original file line number Diff line number Diff line change
Expand Up @@ -48,7 +48,7 @@ search () {
done
}

submodules=("ariane" "boom" "gemmini" "hwacha" "icenet" "nvdla" "rocket-chip" "sha3" "sifive-blocks" "sifive-cache" "testchipip")
submodules=("cva6" "boom" "gemmini" "hwacha" "icenet" "nvdla" "rocket-chip" "sha3" "sifive-blocks" "sifive-cache" "testchipip" "riscv-sodor")
dir="generators"
if [ "$CIRCLE_BRANCH" == "master" ] || [ "$CIRCLE_BRANCH" == "dev" ]
then
Expand Down Expand Up @@ -82,7 +82,12 @@ search

submodules=("coremark" "firemarshal" "nvdla-workload" "spec2017")
dir="software"
branches=("master")
if [ "$CIRCLE_BRANCH" == "master" ] || [ "$CIRCLE_BRANCH" == "dev" ]
then
branches=("master")
else
branches=("master" "dev")
fi
search

submodules=("DRAMSim2" "axe" "barstools" "chisel-testers" "dsptools" "firrtl-interpreter" "torture" "treadle")
Expand Down Expand Up @@ -115,23 +120,33 @@ dir="vlsi"
branches=("master")
search

submodules=("fpga-shells")
dir="fpga"
branches=("master")
search

# turn off verbose printing to make this easier to read
set +x

# print all result strings
# print 0's
for str in "${all_names[@]}";
do
echo "$str"
if [ 0 = $(echo "$str" | awk '{print$3}') ]; then
echo "$str"
fi
done

# check if there was a non-zero return code
echo ""

# check if there was a non-zero return code and print 1's
EXIT=0
for str in "${all_names[@]}";
do
if [ ! 0 = $(echo "$str" | awk '{print$3}') ]; then
exit 1
echo "$str"
EXIT=1
fi
done

echo "Done checking all submodules"

exit $EXIT
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