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Passing MBus clock frequency to SimDRAM #790

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merged 4 commits into from
Feb 18, 2021
Merged

Passing MBus clock frequency to SimDRAM #790

merged 4 commits into from
Feb 18, 2021

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jerryz123
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Related issue:

Type of change: bug fix

@@ -45,6 +45,8 @@ class AbstractConfig extends Config(
new chipyard.config.WithNoSubsystemDrivenClocks ++ // drive the subsystem diplomatic clocks from ChipTop instead of using implicit clocks
new chipyard.config.WithInheritBusFrequencyAssignments ++ // Unspecified clocks within a bus will receive the bus frequency if set
new chipyard.config.WithPeripheryBusFrequencyAsDefault ++ // Unspecified frequencies with match the pbus frequency (which is always set)
new chipyard.config.WithMemoryBusFrequency(100.0) ++ // Default 100 MHz mbus
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Does this affect the default config's simulation speed?

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No. The default was already 100 MHz here, this just makes it more explicit.

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The explicitness is necessary for the WithSimDRAM HarnessBinder to pick it up

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@davidbiancolin davidbiancolin left a comment

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Ideally there'd be a clock sink in the port you could query, instead of grabbing from p(MemoryBusKey), but i know that's easier said than done.

LGTM

@jerryz123 jerryz123 merged commit 5966588 into dev Feb 18, 2021
@jerryz123 jerryz123 deleted the simdram_timings branch February 18, 2021 20:42
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3 participants