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AXI Memory Over TL Serial Link #812

Merged
merged 34 commits into from
Mar 23, 2021
Merged

AXI Memory Over TL Serial Link #812

merged 34 commits into from
Mar 23, 2021

Commits on Feb 27, 2021

  1. Small comments to Clocks.scala

    @abejgonzalez
    abejgonzalez committed Feb 27, 2021
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Commits on Feb 28, 2021

  1. First attempt at getting Offchip AXI port

    @abejgonzalez
    abejgonzalez committed Feb 28, 2021
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Commits on Mar 3, 2021

  1. Enlarge serial width | Bugfix loadmem disable | Add TracerV

    @abejgonzalez
    abejgonzalez committed Mar 3, 2021
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  2. General renaming / cleanup

    @abejgonzalez
    abejgonzalez committed Mar 3, 2021
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  3. Fix FireChip compilation | Remove extra DefaultSerialTL in bridges

    @abejgonzalez
    abejgonzalez committed Mar 3, 2021
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  4. Cleanup | Fix BlockDevice clocking issues

    @abejgonzalez
    abejgonzalez committed Mar 3, 2021
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Commits on Mar 4, 2021

  1. Slightly cleaner implementation

    @abejgonzalez
    abejgonzalez committed Mar 4, 2021
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Commits on Mar 5, 2021

  1. Add support for harness pll

    @abejgonzalez
    abejgonzalez committed Mar 5, 2021
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  2. 1st pass at connecting to harness PLL | Put UART adapter on harnessCl… 

    …ock/Reset
    @abejgonzalez
    abejgonzalez committed Mar 5, 2021
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  3. Cleanup config + fragments | Remove reference clk div/rst catch in ha… 

    …rness [ci skip]
    @abejgonzalez
    abejgonzalez committed Mar 5, 2021
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Commits on Mar 6, 2021

  1. Distinguish between implicit clock/reset and reference harnessClock/R… 

    …eset | Don't use parameter system to pass referenceFreq
    @abejgonzalez
    abejgonzalez committed Mar 6, 2021
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Commits on Mar 8, 2021

  1. Update FireSim to support harness clocks | Small config renaming

    @abejgonzalez
    abejgonzalez committed Mar 8, 2021
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  2. Renaming updates | Have FireSim clocks request frequency by default

    @abejgonzalez
    abejgonzalez committed Mar 8, 2021
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Commits on Mar 9, 2021

  1. First doc pass (no updated imgs) [ci skip]

    @abejgonzalez
    abejgonzalez committed Mar 9, 2021
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  2. Update doc images [ci skip]

    @abejgonzalez
    abejgonzalez committed Mar 9, 2021
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  3. Merge remote-tracking branch 'origin/dev' into offchip-axi-setup

    @abejgonzalez
    abejgonzalez committed Mar 9, 2021
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  4. Fix docs harness binders reference

    @abejgonzalez
    abejgonzalez committed Mar 9, 2021
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Commits on Mar 10, 2021

  1. Clean up the chip communication docs a bit more [ci skip]

    @abejgonzalez
    abejgonzalez committed Mar 10, 2021
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Commits on Mar 11, 2021

  1. Allow the PLL to request the max freq

    @abejgonzalez
    abejgonzalez committed Mar 11, 2021
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  2. More clarifications on harness clocks

    @abejgonzalez
    abejgonzalez committed Mar 11, 2021
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Commits on Mar 15, 2021

  1. Small renaming/cleanup | Use LinkedHashMaps

    @abejgonzalez
    abejgonzalez committed Mar 15, 2021
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  2. Small renaming in docs

    @abejgonzalez
    abejgonzalez committed Mar 15, 2021
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Commits on Mar 17, 2021

  1. Use def instead of var Option for ref frequency

    @abejgonzalez
    abejgonzalez committed Mar 17, 2021
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Commits on Mar 19, 2021

  1. Merge remote-tracking branch 'origin/dev' into offchip-axi-setup

    @abejgonzalez
    abejgonzalez committed Mar 19, 2021
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  2. Small spacing fixes

    @abejgonzalez
    abejgonzalez committed Mar 19, 2021
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  3. Update docs/Advanced-Concepts/Chip-Communication.rst 

    Co-authored-by: alonamid <alonamid@eecs.berkeley.edu>
    @abejgonzalez @alonamid
    abejgonzalez and alonamid authored Mar 19, 2021
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Commits on Mar 20, 2021

  1. Splitting up FireSim default frequencies into a separate config frag.

    @abejgonzalez
    abejgonzalez committed Mar 20, 2021
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  2. Allow run-asm/bmark debug make targets to specify random seed

    @abejgonzalez
    abejgonzalez committed Mar 20, 2021
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  3. Fix TileResetCtrl so that tiles come out of reset after rest of uncore

    @abejgonzalez
    abejgonzalez committed Mar 20, 2021
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  4. Merge branch 'offchip-axi-setup' of github.com:ucb-bar/chipyard into … 

    …offchip-axi-setup
    @abejgonzalez
    abejgonzalez committed Mar 20, 2021
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  5. Bump testchipip

    @abejgonzalez
    abejgonzalez committed Mar 20, 2021
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  6. Use async queue to connect serdesser + other components

    @abejgonzalez
    abejgonzalez committed Mar 20, 2021
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Commits on Mar 21, 2021

  1. Bump testchipip

    @abejgonzalez
    abejgonzalez committed Mar 21, 2021
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Commits on Mar 22, 2021

  1. Update harnessClk/Rst naming to buildtop | Small docs cleanup

    @abejgonzalez
    abejgonzalez committed Mar 22, 2021
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