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ucb-bar / chipyard Public

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Remove GenerateSimFiles and use make instead#879

Merged

abejgonzalez merged 9 commits intodevucb-bar/chipyard:devfrom remove-gen-sim-filesucb-bar/chipyard:remove-gen-sim-filesCopy head branch name to clipboard

May 13, 2021

+90-163

Conversation Commits9 (9)Checks Files changed

Commits

Commits on May 6, 2021

Remove GenerateSimFiles and use make instead
abejgonzalez
committed
Replace spaces with tabs
abejgonzalez
committed
Elaborate comments a bit more | Remove BB'ed files that are auto-copied/added
abejgonzalez
committed
Have Verilator build with unused simulation files
abejgonzalez
committed

Commits on May 7, 2021

Depend on build_dir
abejgonzalez
committed
Fix tutorial patch
abejgonzalez
committed
Add sim_files.f to fpga
abejgonzalez
committed
Forgot to add testchip_tsi.* to verilator
abejgonzalez
committed

Commits on May 12, 2021

Small comment + org. fix | Remove extra mkdirs
abejgonzalez
committed

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